DP Panel Replay needs FEC being enabled. Link computation needs to know if FEC is about to be enabled. Due to this split intel_psr_pre_compute_config from intel_psr_compute_config. This is a preparation to enable FEC for DP Panel Replay.
Signed-off-by: Jouni Högander <[email protected]> --- drivers/gpu/drm/i915/display/intel_dp.c | 2 ++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++ drivers/gpu/drm/i915/display/intel_psr.c | 19 +++++++++++++++---- drivers/gpu/drm/i915/display/intel_psr.h | 2 ++ 4 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0bbbdf10c427d..e7782d41224a4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3676,6 +3676,8 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (intel_dp_hdisplay_bad(display, adjusted_mode->crtc_hdisplay)) return -EINVAL; + intel_psr_pre_compute_config(intel_dp, pipe_config); + /* * Try to respect downstream TMDS clock limits first, if * that fails assume the user might know something we don't. diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index f96f26067ab71..24cc347f38ee1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -640,6 +640,8 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode return -EINVAL; } + intel_psr_pre_compute_config(intel_dp, pipe_config); + /* enable compression if the mode doesn't fit available BW */ if (dsc_needed) { int dsc_slice_count; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index f58200d38ac2c..75614abac24bb 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1927,12 +1927,10 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp, ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe); } -void intel_psr_compute_config(struct intel_dp *intel_dp, - struct intel_crtc_state *crtc_state, - struct drm_connector_state *conn_state) +void intel_psr_pre_compute_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(intel_dp); - struct intel_connector *connector = to_intel_connector(conn_state->connector); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; if (!psr_global_enabled(intel_dp)) { @@ -1963,6 +1961,19 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, return; } + crtc_state->has_psr = true; +} + +void intel_psr_compute_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct intel_connector *connector = + to_intel_connector(conn_state->connector); + + if (!crtc_state->has_psr) + return; + /* Only used for state verification. */ crtc_state->panel_replay_dsc_support = connector->dp.panel_replay_caps.dsc_support; crtc_state->has_panel_replay = _panel_replay_compute_config(crtc_state, conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 29723e63888f8..56af6bde68f86 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -47,6 +47,8 @@ void intel_psr_init(struct intel_dp *intel_dp); void intel_psr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state); +void intel_psr_pre_compute_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state); void intel_psr_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config); void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir); -- 2.43.0
