> -----Original Message-----
> From: Intel-xe <[email protected]> On Behalf Of Chaitanya
> Kumar Borah
> Sent: Wednesday, June 17, 2026 2:38 PM
> To: [email protected]; [email protected]; intel-
> [email protected]
> Cc: Borah, Chaitanya Kumar <[email protected]>
> Subject: [v3 06/14] drm/i915/display: Program input CSC on SDR planes
>
> When a color pipeline is active, program the SDR plane fixed-function CSC.
> Keep
> the legacy color_encoding/color_range properties mutually exclusive with color
> pipeline uapi.
Changes Look Good to me.
Reviewed-by: Uma Shankar <[email protected]>
> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> ---
> .../drm/i915/display/skl_universal_plane.c | 64 ++++++++++++++-----
> 1 file changed, 47 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index da2df5be9848..0e951b36ccca 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1240,33 +1240,63 @@ static u32 glk_plane_color_ctl_crtc(const struct
> intel_crtc_state *crtc_state)
> return plane_color_ctl;
> }
>
> +static u32 intel_csc_ff_type_to_csc_mode(enum
> +drm_colorop_fixed_matrix_type csc_ff_type) {
> + u32 csc_mode;
> +
> + switch (csc_ff_type) {
> + case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
> + csc_mode =
> PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + break;
> + case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
> + csc_mode =
> PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> + break;
> + case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
> + csc_mode =
> PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> + break;
> + case DRM_COLOROP_FM_RGB709_RGB2020:
> + csc_mode =
> PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020;
> + break;
> + default:
> + csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
> + }
> + return csc_mode;
> +}
> +
> static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state
> *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + bool color_pipeline = plane_state->uapi.state &&
> + plane_state->uapi.state->plane_color_pipeline;
> u32 ctl = 0;
>
> - if (!fb->format->is_yuv)
> - return 0;
> + if (!color_pipeline) {
> + if (!fb->format->is_yuv)
> + return 0;
>
> - if (!icl_is_hdr_plane(display, plane->id)) {
> - switch (plane_state->hw.color_encoding) {
> - case DRM_COLOR_YCBCR_BT709:
> - ctl |=
> PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> - break;
> - case DRM_COLOR_YCBCR_BT2020:
> - ctl |=
> PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> - break;
> - default:
> - ctl |=
> PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + if (!icl_is_hdr_plane(display, plane->id)) {
> + switch (plane_state->hw.color_encoding) {
> + case DRM_COLOR_YCBCR_BT709:
> + ctl |=
> PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> + break;
> + case DRM_COLOR_YCBCR_BT2020:
> + ctl |=
> PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> + break;
> + default:
> + ctl |=
> PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + }
> + } else {
> + ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> }
> - } else {
> - ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> - }
>
> - if (plane_state->hw.color_range ==
> DRM_COLOR_YCBCR_FULL_RANGE)
> - ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> + if (plane_state->hw.color_range ==
> DRM_COLOR_YCBCR_FULL_RANGE)
> + ctl |=
> PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> + } else if (!icl_is_hdr_plane(display, plane->id)) {
> + if (plane_state->hw.csc_ff_enable)
> + ctl |= intel_csc_ff_type_to_csc_mode(plane_state-
> >hw.csc_ff_type);
> + }
>
> return ctl;
> }
> --
> 2.25.1
