> -----Original Message-----
> From: Intel-xe <[email protected]> On Behalf Of Chaitanya
> Kumar Borah
> Sent: Wednesday, June 17, 2026 2:38 PM
> To: [email protected]; [email protected]; intel-
> [email protected]
> Cc: Borah, Chaitanya Kumar <[email protected]>
> Subject: [v3 08/14] drm/i915/color: Add YUV range correction to SDR plane
> pipeline
> 
> Insert the INTEL_PLANE_CB_YUV_RANGE_CORRECT color block into the SDR
> plane color pipeline. This enables YCbCr limited-to-full range expansion 
> ahead of
> the CSC block that expects full range pixel data. With this, the pipeline can 
> accept
> limited range framebuffers.

Changes Look Good to me.
Reviewed-by: Uma Shankar <[email protected]>

> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_color_pipeline.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 7d25f4fbfa9b..7457fa51cb97 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -44,6 +44,7 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
> };
> 
>  static const enum intel_color_block sdr_plane_pipeline[] = {
> +     INTEL_PLANE_CB_YUV_RANGE_CORRECT,
>       INTEL_PLANE_CB_CSC_FF,
>  };
> 
> --
> 2.25.1

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