From: Ankit Nautiyal <[email protected]>

Introduce intel_dp_check_m_n_ratio() to validate the computed link M/N
ratio against the maximum allowed value, and log it if the ratio exceeds
the limit.

The link config limits computed in the previous commits only restrict
the configurations that may be selected; this catches anything that
still slips through.

Log it rather than warn about it: the link config filter already
excludes the configurations violating the limit, so the only way to get
here is with link parameters forced through debugfs, which are applied
after that filter. A user triggerable drm_WARN() with its backtrace
would be out of proportion for that.

For MST the check goes after the bpp loop rather than inside it. The
link M/N is computed from the pixel clock and the link symbol clock, so
it does not depend on the bpp being tried and the result is the same on
every iteration.

v2:
-Use the platform specific ratio limit. (Wa_14014191401)
-Use the MSO adjusted pixel clock when predicting the ratio, matching
what the link M/N is actually computed from. (Imre)
-Drop the check from ilk_fdi_compute_config(): it was passing dp_m_n
rather than the fdi_m_n it had just computed, and an FDI link cannot get
anywhere near the ratio limit anyway.
v3:
-Check the ratio once after the MST bpp loop instead of on every
iteration, the result does not depend on the bpp. (Sashiko)
-Log instead of warning, since the link config filter already excludes
these configurations and only forced link parameters can reach it.
(Sashiko)
v4:
-Move the MSO adjusted pixel clock to the commit adding the prediction,
so that one is correct on its own. (Mitul)
-Reuse intel_dp_link_m_n_ratio() instead of open coding the ratio.
(Mitul)
-Drop the m_n and link_n checks, neither can be NULL or 0. Make the
parameters const and move it next to intel_dp_can_support_m_n().
(Mitul)
-Drop the check on dp_m2_n2, the dp_m_n one already covers it. (Mitul)

Signed-off-by: Ankit Nautiyal <[email protected]>
Co-developed-by: Suraj Kandpal <[email protected]>
Signed-off-by: Suraj Kandpal <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h     |  4 ++++
 drivers/gpu/drm/i915/display/intel_dp_mst.c |  2 ++
 3 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index f3a79ae49b18..8ef6b4c4fc8e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1299,6 +1299,21 @@ intel_dp_can_support_m_n(struct intel_display *display,
        return m_n_ratio <= max_m_n_ratio;
 }
 
+void intel_dp_check_m_n_ratio(const struct intel_crtc_state *crtc_state,
+                             const struct intel_link_m_n *m_n)
+{
+       struct intel_display *display = to_intel_display(crtc_state);
+       int max_m_n_ratio = intel_dp_get_max_m_n_ratio(display);
+       int m_n_ratio;
+
+       m_n_ratio = intel_dp_link_m_n_ratio(m_n->link_m, m_n->link_n);
+
+       if (m_n_ratio > max_m_n_ratio)
+               drm_dbg_kms(display->drm,
+                           "Link M/N ratio (%d) exceeds max allowed (%d)\n",
+                           m_n_ratio, max_m_n_ratio);
+}
+
 static int intel_dp_mso_pixel_clock(struct intel_dp *intel_dp, int pixel_clock)
 {
        if (!intel_dp->mso_link_count)
@@ -3755,6 +3770,8 @@ intel_dp_compute_config(struct intel_atomic_state *state,
                                       pipe_config->port_clock,
                                       
intel_dp_bw_fec_overhead(pipe_config->fec_enable),
                                       &pipe_config->dp_m_n);
+
+               intel_dp_check_m_n_ratio(pipe_config, &pipe_config->dp_m_n);
        }
 
        ret = intel_dp_compute_min_hblank(pipe_config, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index aa58833a405b..1e3da678c9b6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -26,6 +26,7 @@ struct intel_display;
 struct intel_dp;
 struct intel_dp_link_config;
 struct intel_encoder;
+struct intel_link_m_n;
 
 struct link_config_limits {
        struct intel_dp_link_caps_filter link_config_filter;
@@ -244,4 +245,7 @@ bool intel_dp_mode_valid_m_n(struct intel_dp *intel_dp, int 
pixel_clock);
 int intel_dp_link_init(struct intel_dp *intel_dp);
 void intel_dp_link_cleanup(struct intel_dp *intel_dp);
 
+void intel_dp_check_m_n_ratio(const struct intel_crtc_state *crtc_state,
+                             const struct intel_link_m_n *m_n);
+
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index f00edfb66a10..8db84975f36b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -429,6 +429,8 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp 
*intel_dp,
                return slots;
        }
 
+       intel_dp_check_m_n_ratio(crtc_state, &crtc_state->dp_m_n);
+
        if (!dsc)
                crtc_state->pipe_bpp = fxp_q4_to_int(bpp_x16);
        else
-- 
2.34.1

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