I used the command : "dmesg | grep ttyS2" as that is the serial port on my
board, it shows the MMIO address at 0x9222e000 however when I add that to
debug_console.phys_start(originally 0x3f8) in my configs/myboard.c (attached) ,
I still get the same error(cpu stalls and no hypervisor output :( ), again as
I said I think there needs something else to be configured in this file as I
don't think it is made up in a way such that it will get support from the
hardware( board attached to my laptop ) especially the I/O else I am unsure of
what to change now in order to get this root cell running because I do not get
any error message when the program looks for firmware and checks for memory
allocated for jailhouse in the jailhouse_cmd_enable(); function , jailhouse.ko
is also loaded properly (checked using 'lsmod' command ), intel_iommu is off
during jailhouse enable so I think the error has to be incorrect configuration
file given that all of you do not find any problem with my OS , make and kernel
version I specified in the first post on this topic.
Few things to clarify: during boot up of my board, the very last message I see
is ttyS2 - failed to request DMA , should that be a problem? , there is no need
for an ssh to get hypervisor output right since I am suing USB-Serial, yes for
VGA we need but not for USB-Serial right? , Any questions you have in mind
regarding my CPU configuration?
Regards,
Swaraj Dube.
-----Original Message-----
From: jailhouse-dev@googlegroups.com [mailto:jailhouse-dev@googlegroups.com] On
Behalf Of Valentine Sinitsyn
Sent: Thursday, July 14, 2016 5:23 PM
To: Dube, Swaraj <swaraj.d...@intel.com>; Jan Kiszka <jan.kis...@siemens.com>;
Jailhouse <jailhouse-dev@googlegroups.com>
Cc: Hii, Roland King Guan <roland.king.guan....@intel.com>
Subject: Re: ioctl function not completing and hypervisor output
On 14.07.2016 14:16, Dube, Swaraj wrote:
> Hi,
>
> I just got to know that the board I am using uses MMIO, I will have to
> confirm the base addresses in config/myboard.c with the team in that case
> however should that be a problem?
IIRC debug port setting has no effect on MMIO. But I vaguely recall the details
of how we handle this in Jailhouse; you'd have to check in arch/dbg-write.c.
Valentine
>
> Regards,
> Swaraj Dube.
>
> -----Original Message-----
> From: Valentine Sinitsyn [mailto:valentine.sinit...@gmail.com]
> Sent: Thursday, July 14, 2016 3:21 PM
> To: Dube, Swaraj <swaraj.d...@intel.com>; Jan Kiszka
> <jan.kis...@siemens.com>; Jailhouse <jailhouse-dev@googlegroups.com>
> Subject: Re: ioctl function not completing and hypervisor output
>
> Hi,
>
> On 14.07.2016 11:02, Dube, Swaraj wrote:
>> Hi,
>>
>> Sounds like a good idea, firstly Valentine has a good point I also think
>> there is something wrong with the I/O port access (if not then something
>> else in the I/O) so I changed debug_console.phys_start points from 0x3f8 to
>> 0x3e8 in my configs/myboard.c and then make again to obtain a new
>> myboard.cell file as I am using ttyS2 (I checked this in my
>> /boot/EFI/BOOT/grub.cfg) and it's standard address is 0x3e8 but is that it?,
>> I think I may have to change something else in myboard.c but I am unsure of
>> what to change if any.
>>
>> I turned CPU 1 offline and tried enabling jailhouse and I get an Invalid
>> argument error for JAILHOUSE_ENABLE obviously due to the return of -EINVAL
>> from jailhouse_cmd_enable() function from driver/main.c due to the if
>> conditions set but still no hypervisor output, I just see the printf();
>> messages I manually created, I then read about the article contributed by
>> valentine on understanding the jailhouse hypervisor:
>> https://lwn.net/Articles/578295/ that explains about the role of the
>> functions and how calls are made. I realize that my program is not entering
>> the entry(); or init_early(); function in hypervisor/setup.c file as this is
>> the file which seems to be printing out the hypervisor output , may be the
>> system is crashing before that ? , may be the information about the IO in
>> configs/myboard.c still incorrect (my suspect) , Any suggestions?
> If having debug port wrong is really the culprit, check your BIOS/UEFI.
> Often you may view/change I/O ports for COMx there.
>
> Valentine
>
>>
>> Regards,
>> Swaraj Dube.
>>
>> -----Original Message-----
>> From: Jan Kiszka [mailto:jan.kis...@siemens.com]
>> Sent: Wednesday, July 13, 2016 11:15 PM
>> To: Dube, Swaraj <swaraj.d...@intel.com>; Valentine Sinitsyn
>> <valentine.sinit...@gmail.com>; Jailhouse
>> <jailhouse-dev@googlegroups.com>
>> Subject: Re: ioctl function not completing and hypervisor output
>>
>> On 2016-07-13 18:07, Dube, Swaraj wrote:
>>> Hi,
>>>
>>> Thanks for the reply, I think what you are referring to is the COM right ,
>>> I read about it, COM1-4 having I/O port addresses 0x3f8 , 0x2f8 , 0x3e8 and
>>> 0x2e8 respectively . Currently debug_console.phys_start in my
>>> configs/myboard.c points to the address 0x3f8 which should be of standard
>>> COM1 whereas I am using COM5 so I'll try finding the address of COM5, hope
>>> I am getting it right, kindly correct me if I am getting it wrong.
>>
>> If you want to debug the UART output of Jailhouse without crashing
>> your system every time: Take one of the configured cores offline
>> (echo 0 >
>> /sys/devices/system/cpu/cpu1/online) before calling jailhouse enable.
>> That will make the hypervisor fail gracefully with -EINVAL, but you will see
>> messages of it trying to enable the remaining CPUs - provided we do not
>> crash even earlier in the setup.
>>
>> Jan
>>
>> --
>> Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate
>> Competence Center Embedded Linux
>>
--
С уважением,
Синицын Валентин
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Siemens AG, 2014-2016
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Alternatively, you can use or redistribute this file under the following
* BSD license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for Intel Corp. Broxton P
* created with 'tools/jailhouse config create -r myboard/ configs/myboard.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x4200000$0x3b000000"
*/
#include <linux/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[91];
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[35];
struct jailhouse_pci_capability pci_caps[45];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.hypervisor_memory = {
.phys_start = 0x3b000000,
.size = 0x4000000,
},
.debug_console = {
.phys_start = 0x9222e000,
},
.platform_info.x86 = {
.mmconfig_base = 0xe0000000,
.mmconfig_end_bus = 0x3f,
.pm_timer_address = 0x408,
.iommu_units = {
{
.base = 0xfed64000,
.size = 0x1000,
},
{
.base = 0xfed65000,
.size = 0x1000,
},
},
},
.interrupt_limit = 256,
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0x000000000000000f,
},
.mem_regions = {
/* MemRegion: 00000000-00057fff : System RAM */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x58000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00059000-0009dfff : System RAM */
{
.phys_start = 0x59000,
.virt_start = 0x59000,
.size = 0x45000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 00100000-02ffffff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x2f00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 03000000-05ffffff : Kernel */
{
.phys_start = 0x3000000,
.virt_start = 0x3000000,
.size = 0x3000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 06000000-0effffff : System RAM */
{
.phys_start = 0x6000000,
.virt_start = 0x6000000,
.size = 0x9000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 12152000-3affffff : System RAM */
{
.phys_start = 0x12152000,
.virt_start = 0x12152000,
.size = 0x28eae000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3f200000-78190fff : System RAM */
{
.phys_start = 0x3f200000,
.virt_start = 0x3f200000,
.size = 0x38f91000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 79f41000-79f8dfff : ACPI Non-volatile Storage */
{
.phys_start = 0x79f41000,
.virt_start = 0x79f41000,
.size = 0x4d000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 79f8f000-79fa0fff : ACPI Non-volatile Storage */
{
.phys_start = 0x79f8f000,
.virt_start = 0x79f8f000,
.size = 0x12000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 79fa1000-79fd0fff : ACPI Tables */
{
.phys_start = 0x79fa1000,
.virt_start = 0x79fa1000,
.size = 0x30000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 79fd1000-7ab78fff : System RAM */
{
.phys_start = 0x79fd1000,
.virt_start = 0x79fd1000,
.size = 0xba8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7ab79000-7ab79fff : ACPI Non-volatile Storage */
{
.phys_start = 0x7ab79000,
.virt_start = 0x7ab79000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 7aba4000-7affffff : System RAM */
{
.phys_start = 0x7aba4000,
.virt_start = 0x7aba4000,
.size = 0x45c000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 80000000-8fffffff : 0000:00:02.0 */
{
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0x10000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 90000000-90ffffff : 0000:00:02.0 */
{
.phys_start = 0x90000000,
.virt_start = 0x90000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 91000000-91ffffff : 0000:00:03.0 */
{
.phys_start = 0x91000000,
.virt_start = 0x91000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92000000-920fffff : ICH HD audio */
{
.phys_start = 0x92000000,
.virt_start = 0x92000000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92100000-9211ffff : igb_avb */
{
.phys_start = 0x92100000,
.virt_start = 0x92100000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92121000-92123fff : igb_avb */
{
.phys_start = 0x92121000,
.virt_start = 0x92121000,
.size = 0x3000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92200000-9220ffff : xhci-hcd */
{
.phys_start = 0x92200000,
.virt_start = 0x92200000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92210000-92217fff : 0000:00:00.1 */
{
.phys_start = 0x92210000,
.virt_start = 0x92210000,
.size = 0x8000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92218000-9221bfff : ICH HD audio */
{
.phys_start = 0x92218000,
.virt_start = 0x92218000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9221c000-9221dfff : heci_ish */
{
.phys_start = 0x9221c000,
.virt_start = 0x9221c000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9221e000-9221ffff : ahci */
{
.phys_start = 0x9221e000,
.virt_start = 0x9221e000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92220000-92220fff : mei_me */
{
.phys_start = 0x92220000,
.virt_start = 0x92220000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92223000-92223fff : heci_ish */
{
.phys_start = 0x92223000,
.virt_start = 0x92223000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92224000-922241ff : lpss_dev */
{
.phys_start = 0x92224000,
.virt_start = 0x92224000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92224200-922242ff : lpss_priv */
{
.phys_start = 0x92224200,
.virt_start = 0x92224200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92224800-92224fff : idma64.0 */
{
.phys_start = 0x92224800,
.virt_start = 0x92224800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92225000-922251ff : lpss_dev */
{
.phys_start = 0x92225000,
.virt_start = 0x92225000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92225200-922252ff : lpss_priv */
{
.phys_start = 0x92225200,
.virt_start = 0x92225200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92225800-92225fff : idma64.1 */
{
.phys_start = 0x92225800,
.virt_start = 0x92225800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92226000-922261ff : lpss_dev */
{
.phys_start = 0x92226000,
.virt_start = 0x92226000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92226200-922262ff : lpss_priv */
{
.phys_start = 0x92226200,
.virt_start = 0x92226200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92226800-92226fff : idma64.2 */
{
.phys_start = 0x92226800,
.virt_start = 0x92226800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92227000-922271ff : lpss_dev */
{
.phys_start = 0x92227000,
.virt_start = 0x92227000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92227200-922272ff : lpss_priv */
{
.phys_start = 0x92227200,
.virt_start = 0x92227200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92227800-92227fff : idma64.3 */
{
.phys_start = 0x92227800,
.virt_start = 0x92227800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92228000-922281ff : lpss_dev */
{
.phys_start = 0x92228000,
.virt_start = 0x92228000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92228200-922282ff : lpss_priv */
{
.phys_start = 0x92228200,
.virt_start = 0x92228200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92228800-92228fff : idma64.4 */
{
.phys_start = 0x92228800,
.virt_start = 0x92228800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92229000-922291ff : lpss_dev */
{
.phys_start = 0x92229000,
.virt_start = 0x92229000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92229200-922292ff : lpss_priv */
{
.phys_start = 0x92229200,
.virt_start = 0x92229200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92229800-92229fff : idma64.5 */
{
.phys_start = 0x92229800,
.virt_start = 0x92229800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222a000-9222a1ff : lpss_dev */
{
.phys_start = 0x9222a000,
.virt_start = 0x9222a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222a200-9222a2ff : lpss_priv */
{
.phys_start = 0x9222a200,
.virt_start = 0x9222a200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222a800-9222afff : idma64.6 */
{
.phys_start = 0x9222a800,
.virt_start = 0x9222a800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222b000-9222b1ff : lpss_dev */
{
.phys_start = 0x9222b000,
.virt_start = 0x9222b000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222b200-9222b2ff : lpss_priv */
{
.phys_start = 0x9222b200,
.virt_start = 0x9222b200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222b800-9222bfff : idma64.7 */
{
.phys_start = 0x9222b800,
.virt_start = 0x9222b800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222c000-9222c01f : serial */
{
.phys_start = 0x9222c000,
.virt_start = 0x9222c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222c200-9222c2ff : lpss_priv */
{
.phys_start = 0x9222c200,
.virt_start = 0x9222c200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222c800-9222cfff : idma64.8 */
{
.phys_start = 0x9222c800,
.virt_start = 0x9222c800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222d000-9222d01f : serial */
{
.phys_start = 0x9222d000,
.virt_start = 0x9222d000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222d200-9222d2ff : lpss_priv */
{
.phys_start = 0x9222d200,
.virt_start = 0x9222d200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222d800-9222dfff : idma64.9 */
{
.phys_start = 0x9222d800,
.virt_start = 0x9222d800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222e000-9222e01f : serial */
{
.phys_start = 0x9222e000,
.virt_start = 0x9222e000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222e200-9222e2ff : lpss_priv */
{
.phys_start = 0x9222e200,
.virt_start = 0x9222e200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222f000-9222f01f : serial */
{
.phys_start = 0x9222f000,
.virt_start = 0x9222f000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 9222f200-9222f2ff : lpss_priv */
{
.phys_start = 0x9222f200,
.virt_start = 0x9222f200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92230000-922301ff : lpss_dev */
{
.phys_start = 0x92230000,
.virt_start = 0x92230000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92230200-922302ff : lpss_priv */
{
.phys_start = 0x92230200,
.virt_start = 0x92230200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92230800-92230fff : idma64.12 */
{
.phys_start = 0x92230800,
.virt_start = 0x92230800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92231000-922311ff : lpss_dev */
{
.phys_start = 0x92231000,
.virt_start = 0x92231000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92231200-922312ff : lpss_priv */
{
.phys_start = 0x92231200,
.virt_start = 0x92231200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92231800-92231fff : idma64.13 */
{
.phys_start = 0x92231800,
.virt_start = 0x92231800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92232000-922321ff : lpss_dev */
{
.phys_start = 0x92232000,
.virt_start = 0x92232000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92232200-922322ff : lpss_priv */
{
.phys_start = 0x92232200,
.virt_start = 0x92232200,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92232800-92232fff : idma64.14 */
{
.phys_start = 0x92232800,
.virt_start = 0x92232800,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92233000-92233fff : mmc0 */
{
.phys_start = 0x92233000,
.virt_start = 0x92233000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92234000-92234fff : mmc1 */
{
.phys_start = 0x92234000,
.virt_start = 0x92234000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92235000-92235fff : mmc2 */
{
.phys_start = 0x92235000,
.virt_start = 0x92235000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92236000-922367ff : ahci */
{
.phys_start = 0x92236000,
.virt_start = 0x92236000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92237000-922370ff : 0000:00:1f.1 */
{
.phys_start = 0x92237000,
.virt_start = 0x92237000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 92238000-922380ff : ahci */
{
.phys_start = 0x92238000,
.virt_start = 0x92238000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: d0c00000-d0c00653 : INT3452:03 */
{
.phys_start = 0xd0c00000,
.virt_start = 0xd0c00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: d0c40000-d0c40763 : INT3452:01 */
{
.phys_start = 0xd0c40000,
.virt_start = 0xd0c40000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: d0c50000-d0c5076b : INT3452:00 */
{
.phys_start = 0xd0c50000,
.virt_start = 0xd0c50000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: d0c70000-d0c70673 : INT3452:02 */
{
.phys_start = 0xd0c70000,
.virt_start = 0xd0c70000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fea00000-feafffff : pnp 00:01 */
{
.phys_start = 0xfea00000,
.virt_start = 0xfea00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed03000-fed03fff : pnp 00:01 */
{
.phys_start = 0xfed03000,
.virt_start = 0xfed03000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed06000-fed06fff : pnp 00:01 */
{
.phys_start = 0xfed06000,
.virt_start = 0xfed06000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed08000-fed09fff : pnp 00:01 */
{
.phys_start = 0xfed08000,
.virt_start = 0xfed08000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed1c000-fed1cfff : pnp 00:01 */
{
.phys_start = 0xfed1c000,
.virt_start = 0xfed1c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed40000-fed44fff : MSFT0101:00 */
{
.phys_start = 0xfed40000,
.virt_start = 0xfed40000,
.size = 0x5000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed80000-fedbffff : pnp 00:01 */
{
.phys_start = 0xfed80000,
.virt_start = 0xfed80000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 100000000-1ffffffff : System RAM */
{
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x100000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 79f1c000-79f3bfff : ACPI DMAR RMRR */
/* PCI device: 00:15.0 */
{
.phys_start = 0x79f1c000,
.virt_start = 0x79f1c000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 7b800000-7fffffff : ACPI DMAR RMRR */
/* PCI device: 00:02.0 */
{
.phys_start = 0x7b800000,
.virt_start = 0x7b800000,
.size = 0x4800000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 3f000000-3f1fffff : JAILHOUSE Inmate Memory */
{
.phys_start = 0x3f000000,
.virt_start = 0x3f000000,
.size = 0x200000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 1, GSI base 0 */
{
.address = 0xfec00000,
.id = 0x0,
.pin_bitmap = 0xffffff,
},
},
.pio_bitmap = {
[ 0/8 ... 0x3f/8] = -1,
[ 0x40/8 ... 0x47/8] = 0xf0, /* PIT */
[ 0x48/8 ... 0x5f/8] = -1,
[ 0x60/8 ... 0x67/8] = 0xec, /* HACK: NMI status/control */
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x70/8 ... 0x77/8] = 0xfc, /* RTC */
[ 0x78/8 ... 0x7f/8] = -1,
[ 0x80/8 ... 0x87/8] = 0xfe, /* Linux: native_io_delay() */
[ 0x88/8 ... 0x3af/8] = -1,
[ 0x3b0/8 ... 0x3df/8] = 0x00, /* VGA */
[ 0x3e0/8 ... 0xcff/8] = -1,
[ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
},
.pci_devices = {
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:00.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x1,
.bar_mask = {
0xffff8000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.bar_mask = {
0xff000000, 0xffffffff, 0x00000000,
0xf0000000, 0xffffffff, 0x00000000,
},
.caps_start = 2,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:03.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x18,
.bar_mask = {
0xff000000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 9,
.num_caps = 4,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:0e.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x70,
.bar_mask = {
0xffffc000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0xfff00000,
},
.caps_start = 13,
.num_caps = 5,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:0f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x78,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 18,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:11.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x88,
.bar_mask = {
0xffffe000, 0xffffffff, 0x00000000,
0xfffff000, 0xffffffff, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:12.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x90,
.bar_mask = {
0xffffe000, 0xffffff00, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfffff800,
},
.caps_start = 23,
.num_caps = 3,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:13.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x98,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:13.2 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x9a,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:13.3 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x9b,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:14.1 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa1,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 26,
.num_caps = 9,
.num_msi_vectors = 1,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:15.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xa8,
.bar_mask = {
0xffff0000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 35,
.num_caps = 3,
.num_msi_vectors = 8,
.msi_64bits = 1,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb1,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb2,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:16.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb3,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb8,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xb9,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xba,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:17.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xbb,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:18.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:18.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc1,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:18.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc2,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:18.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc3,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:19.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc8,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:19.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xc9,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:19.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xca,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1b.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xd8,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1c.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xe0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1e.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xf0,
.bar_mask = {
0xfffff000, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 21,
.num_caps = 2,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.1 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0xf9,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0xffffffe0,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 02:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 1,
.domain = 0x0,
.bdf = 0x200,
.bar_mask = {
0xfffe0000, 0x00000000, 0xffffffe0,
0xffffc000, 0x00000000, 0x00000000,
},
.caps_start = 38,
.num_caps = 7,
.num_msi_vectors = 1,
.msi_64bits = 1,
.num_msix_vectors = 5,
.msix_region_size = 0x1000,
.msix_address = 0x92120000,
},
},
.pci_caps = {
/* PCIDevice: 00:00.1 */
{
.id = 0x1,
.start = 0xd0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x9,
.start = 0xe0,
.len = 2,
.flags = 0,
},
/* PCIDevice: 00:02.0 */
{
.id = 0x9,
.start = 0x40,
.len = 2,
.flags = 0,
},
{
.id = 0x10,
.start = 0x70,
.len = 44,
.flags = 0,
},
{
.id = 0x5,
.start = 0xac,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x1,
.start = 0xd0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x1b | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = 0xf | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 4,
.flags = 0,
},
{
.id = 0x13 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x300,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:03.0 */
{
.id = 0x10,
.start = 0x70,
.len = 44,
.flags = 0,
},
{
.id = 0x5,
.start = 0xac,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x1,
.start = 0xd0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:0e.0 */
{
.id = 0x1,
.start = 0x50,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x9,
.start = 0x80,
.len = 2,
.flags = 0,
},
{
.id = 0x5,
.start = 0x60,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x10,
.start = 0x70,
.len = 20,
.flags = 0,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:0f.0 */
{
.id = 0x1,
.start = 0x50,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x5,
.start = 0x8c,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x9,
.start = 0xa4,
.len = 2,
.flags = 0,
},
/* PCIDevice: 00:11.0 */
/* PCIDevice: 00:16.0 */
/* PCIDevice: 00:16.1 */
/* PCIDevice: 00:16.2 */
/* PCIDevice: 00:16.3 */
/* PCIDevice: 00:17.0 */
/* PCIDevice: 00:17.1 */
/* PCIDevice: 00:17.2 */
/* PCIDevice: 00:17.3 */
/* PCIDevice: 00:18.0 */
/* PCIDevice: 00:18.1 */
/* PCIDevice: 00:18.2 */
/* PCIDevice: 00:18.3 */
/* PCIDevice: 00:19.0 */
/* PCIDevice: 00:19.1 */
/* PCIDevice: 00:19.2 */
/* PCIDevice: 00:1b.0 */
/* PCIDevice: 00:1c.0 */
/* PCIDevice: 00:1e.0 */
{
.id = 0x1,
.start = 0x80,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x9,
.start = 0x90,
.len = 2,
.flags = 0,
},
/* PCIDevice: 00:12.0 */
{
.id = 0x5,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x1,
.start = 0x70,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x12,
.start = 0xa8,
.len = 2,
.flags = 0,
},
/* PCIDevice: 00:13.0 */
/* PCIDevice: 00:13.2 */
/* PCIDevice: 00:13.3 */
/* PCIDevice: 00:14.0 */
/* PCIDevice: 00:14.1 */
{
.id = 0x10,
.start = 0x40,
.len = 44,
.flags = 0,
},
{
.id = 0x5,
.start = 0x80,
.len = 10,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0xd,
.start = 0x90,
.len = 2,
.flags = 0,
},
{
.id = 0x1,
.start = 0xa0,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = 0xd | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 4,
.flags = 0,
},
{
.id = 0x1f | JAILHOUSE_PCI_EXT_CAP,
.start = 0x150,
.len = 4,
.flags = 0,
},
{
.id = 0x1e | JAILHOUSE_PCI_EXT_CAP,
.start = 0x200,
.len = 4,
.flags = 0,
},
{
.id = 0x0 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x220,
.len = 4,
.flags = 0,
},
/* PCIDevice: 00:15.0 */
{
.id = 0x1,
.start = 0x70,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x5,
.start = 0x80,
.len = 14,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x9,
.start = 0x90,
.len = 2,
.flags = 0,
},
/* PCIDevice: 02:00.0 */
{
.id = 0x1,
.start = 0x40,
.len = 8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x5,
.start = 0x50,
.len = 24,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x11,
.start = 0x70,
.len = 12,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = 0x10,
.start = 0xa0,
.len = 44,
.flags = 0,
},
{
.id = 0x1 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 4,
.flags = 0,
},
{
.id = 0x3 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 4,
.flags = 0,
},
{
.id = 0x17 | JAILHOUSE_PCI_EXT_CAP,
.start = 0x1a0,
.len = 4,
.flags = 0,
},
},
};
