This should help to enable GICv3 for ARM64: Remove the virtualization of MPIDR on 32-bit ARM and clean up the code around it.
Unfortunately, I didn't manage to test this on ARM with GICv3, only with GICv2. So I will definitely hold this series back until we have at least a working demo on ARM64 with v3 again. Please review carefully! Jan Jan Kiszka (10): arm-common: Remove redundant zero-initialization arm-common: Remove redundant statement for SGI routing mode 2 arm-common: Clearify the role of gicv2_target_cpu_map in GICv3 mode arm: Declare each redistributor region to be last arm: Switch redistributor handling completely to MMIO dispatcher arm: Detect unsupported Aff0 values in MPIDR arm: Move gicr per-cpu parameter into struct arm: Track physical address of redistributors for each CPU arm: Remove MPIDR virtualization arm, arm64: Remove remaining traces of virt_id configs/dts/inmate-bananapi.dts | 4 +- configs/dts/inmate-jetson-tk1.dts | 8 +- configs/dts/inmate-orangepi0.dts | 6 +- hypervisor/arch/arm-common/include/asm/gic.h | 2 +- hypervisor/arch/arm-common/irqchip.c | 24 +++--- hypervisor/arch/arm/control.c | 35 +------- hypervisor/arch/arm/gic-v3.c | 116 ++++++++++++--------------- hypervisor/arch/arm/include/asm/cell.h | 2 - hypervisor/arch/arm/include/asm/percpu.h | 19 ++--- hypervisor/arch/arm/include/asm/sysregs.h | 4 +- hypervisor/arch/arm/setup.c | 1 - hypervisor/arch/arm64/control.c | 20 ----- hypervisor/arch/arm64/include/asm/percpu.h | 14 ---- hypervisor/arch/arm64/include/asm/sysregs.h | 3 +- 14 files changed, 90 insertions(+), 168 deletions(-) -- 2.12.3 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
