From: Jan Kiszka <[email protected]> This prepares for adding another GICv3 parameter later on.
ARM64 is not using the field yet, but it already carries it. So update this side as well. Signed-off-by: Jan Kiszka <[email protected]> --- Changes in v2: - also adjust per_cpu struct of arm64 hypervisor/arch/arm/gic-v3.c | 12 ++++++------ hypervisor/arch/arm/include/asm/percpu.h | 9 ++++++--- hypervisor/arch/arm64/include/asm/percpu.h | 9 ++++++--- 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/hypervisor/arch/arm/gic-v3.c b/hypervisor/arch/arm/gic-v3.c index 4987e2bc..15701db0 100644 --- a/hypervisor/arch/arm/gic-v3.c +++ b/hypervisor/arch/arm/gic-v3.c @@ -71,7 +71,7 @@ static void gic_clear_pending_irqs(void) static void gic_cpu_reset(struct per_cpu *cpu_data) { unsigned int mnt_irq = system_config->platform_info.arm.maintenance_irq; - void *gicr = cpu_data->gicr_base + GICR_SGI_BASE; + void *gicr = cpu_data->gicr.base + GICR_SGI_BASE; gic_clear_pending_irqs(); @@ -106,14 +106,14 @@ static int gic_cpu_init(struct per_cpu *cpu_data) typer = mmio_read64(redist_base + GICR_TYPER); if ((typer >> 32) == cpu_data->cpu_id) { - cpu_data->gicr_base = redist_base; + cpu_data->gicr.base = redist_base; break; } redist_base += gic_version == 4 ? 0x40000 : 0x20000; } while (!(typer & GICR_TYPER_Last)); - if (!cpu_data->gicr_base) { + if (!cpu_data->gicr.base) { printk("GIC: No redist found for CPU%d\n", cpu_data->cpu_id); return -ENODEV; } @@ -172,13 +172,13 @@ static void gic_cpu_shutdown(struct per_cpu *cpu_data) { u32 ich_vmcr, icc_ctlr, cell_icc_igrpen1; - if (!cpu_data->gicr_base) + if (!cpu_data->gicr.base) return; arm_write_sysreg(ICH_HCR_EL2, 0); /* Disable the maintenance interrupt - not used by Linux. */ - mmio_write32(cpu_data->gicr_base + GICR_SGI_BASE + GICR_ICENABLER, + mmio_write32(cpu_data->gicr.base + GICR_SGI_BASE + GICR_ICENABLER, 1 << system_config->platform_info.arm.maintenance_irq); /* Restore the root config */ @@ -233,7 +233,7 @@ static enum mmio_result gic_handle_redist_access(void *arg, return MMIO_HANDLED; } } - mmio_perform_access(cpu_data->gicr_base, mmio); + mmio_perform_access(cpu_data->gicr.base, mmio); return MMIO_HANDLED; } diff --git a/hypervisor/arch/arm/include/asm/percpu.h b/hypervisor/arch/arm/include/asm/percpu.h index 64e79914..68f8ea18 100644 --- a/hypervisor/arch/arm/include/asm/percpu.h +++ b/hypervisor/arch/arm/include/asm/percpu.h @@ -52,9 +52,12 @@ struct per_cpu { union { /** Only GICv2: per-cpu initialization completed. */ bool gicc_initialized; - /** Only GICv3: physical redistributor base. When non-NULL, - * per-cpu initialization completed. */ - void *gicr_base; + /** Only GICv3 */ + struct { + /** mapped redistributor base. When non-NULL, per-cpu + * cpu initialization completed.*/ + void *base; + } gicr; }; struct cell *cell; diff --git a/hypervisor/arch/arm64/include/asm/percpu.h b/hypervisor/arch/arm64/include/asm/percpu.h index 5bfece6d..f7452d1a 100644 --- a/hypervisor/arch/arm64/include/asm/percpu.h +++ b/hypervisor/arch/arm64/include/asm/percpu.h @@ -45,9 +45,12 @@ struct per_cpu { union { /** Only GICv2: per-cpu initialization completed. */ bool gicc_initialized; - /** Only GICv3: physical redistributor base. When non-NULL, - * per-cpu initialization completed. */ - void *gicr_base; + /** Only GICv3 */ + struct { + /** mapped redistributor base. When non-NULL, per-cpu + * cpu initialization completed.*/ + void *base; + } gicr; }; unsigned long mpidr; -- 2.12.3 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
