From: Jan Kiszka <[email protected]>

In case of mode 2, the targets field won't be evaluated. So we can save
one statement, initialized targets to 0 unconditionally, and instead
invest in explaining when we need to tune it further.

Signed-off-by: Jan Kiszka <[email protected]>
---
 hypervisor/arch/arm-common/irqchip.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/hypervisor/arch/arm-common/irqchip.c 
b/hypervisor/arch/arm-common/irqchip.c
index 4103fed4..75638578 100644
--- a/hypervisor/arch/arm-common/irqchip.c
+++ b/hypervisor/arch/arm-common/irqchip.c
@@ -133,13 +133,12 @@ void gic_handle_sgir_write(struct sgi *sgi, bool 
virt_input)
        unsigned long targets = sgi->targets;
        unsigned int cpu;
 
-       if (sgi->routing_mode == 2) {
+       sgi->targets = 0;
+
+       if (sgi->routing_mode == 2)
                /* Route to the caller itself */
                irqchip_set_pending(cpu_data, sgi->id);
-               sgi->targets = (1 << cpu_data->cpu_id);
-       } else {
-               sgi->targets = 0;
-
+       else
                for_each_cpu(cpu, cpu_data->cell->cpu_set) {
                        if (sgi->routing_mode == 1) {
                                /* Route to all (cell) CPUs but the caller. */
@@ -162,9 +161,14 @@ void gic_handle_sgir_write(struct sgi *sgi, bool 
virt_input)
                        }
 
                        irqchip_set_pending(per_cpu(cpu), sgi->id);
+
+                       /*
+                        * routing_mode will be propagated to irqchip_send_sgi.
+                        * as well. So this adjustment is only targeting the
+                        * mode 0 case.
+                        */
                        sgi->targets |= (1 << cpu);
                }
-       }
 
        /* Let the other CPUS inject their SGIs */
        sgi->id = SGI_INJECT;
-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

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