Il giorno domenica 10 dicembre 2017 17:34:24 UTC+1, jonas ha scritto:
> Hi,
>
> I'll be making an effort to contribute my work to the master branch of
> Jailhouse within the next couple of weeks.
>
> /Jonas
>
> Den fredag 8 december 2017 kl. 06:47:33 UTC+1 skrev Constantin Petra:
> > Hi,
> >
> >
> > I'm resending the patch(es) that were shared by Jonas a while ago.
> >
> >
> > Best Regards,
> > Constantin
> >
> >
> > On Thu, Dec 7, 2017 at 10:08 PM, Henning Schild <henning...@siemens.com>
> > wrote:
> > Hi Claudio,
> >
> >
> >
> > Am Thu, 7 Dec 2017 17:29:45 +0100
> >
> > schrieb Claudio Scordino <cla...@evidence.eu.com>:
> >
> >
> >
> > > Hi guys,
> >
> > >
> >
> > > 2017-08-09 15:23 GMT+02:00 Henning Schild
> >
> > > <henning...@siemens.com>:
> >
> > >
> >
> > > > Hey,
> >
> > > >
> >
> > > > unfortunately Jonas never published his overall changes, maybe now
> >
> > > > he understands why i kindly asked him to do so.
> >
> > > > I think Jonas maybe ran into every single problem one could
> >
> > > > encounter on the way, so if you read the thread you will probably
> >
> > > > be able to come up with a similar patch at some point. That would
> >
> > > > be the duplication of efforts, getting a first working patch into a
> >
> > > > mergeable form is another story.
> >
> > > >
> >
> > > > If there are legal reasons to not publish code on the list i suggest
> >
> > > > you exchange patches between each other. But of cause i would like
> >
> > > > to see contributions eventually ;).
> >
> > > >
> >
> > > >
> >
> > > We need to run IVSHMEM on the TX1.
> >
> > > Any chance of upstreaming those patches to not waste time
> >
> > > re-inventing the wheel ?
> >
> > > If that's not possible, please send me a copy privately.
> >
> >
> >
> > Unfortunately i do not have those patches either. I am afraid someone
> >
> > will have to do that over again.
> >
> >
> >
> > But the whole thread is basically about enabling the demo, which is
> >
> > interesting for people just getting started with ivshmem. And for
> >
> > people that want to implement their own protocol on top of it.
> >
> > If you are just looking at running ivshmem-net you are good to go, that
> >
> > code is in a working state.
> >
> >
> >
> > Henning
> >
> >
> >
> >
> >
> > > Many thanks and best regards,
> >
> > >
> >
> > > Claudio
Hi all,
i've applied the provided patch and i'm trying to connect the linux root cell
with the bare metal cell running the inmate/demo/arm/ivshmem-demo.c. I've
attached the used configurations (jetson-tx1-ivshmem for the root cell and the
other one for the bare metal).
When i create the bare metal cell the connection between pci devices is
correctly up.
-----------------------------------------------------------------
Initializing Jailhouse hypervisor on CPU 2
Code location: 0x0000ffffc0200050
Page pool usage after early setup: mem 63/16358, remap 64/131072
Initializing processors:
CPU 2... OK
CPU 1... OK
CPU 3... OK
CPU 0... OK
Adding virtual PCI device 00:0f.0 to cell "Jetson-TX1-ivshmem"
Page pool usage after late setup: mem 74/16358, remap 69/131072
Activating hypervisor
Adding virtual PCI device 00:0f.0 to cell "jetson-tx1-demo-shmem"
Shared memory connection established: "jetson-tx1-demo-shmem" <-->
"Jetson-TX1-ivshmem"
-------------------------------------------------------------------
1st problem: no PCI device appears in linux (lspci does not return anything)
Then i launch the ivshmem-demo.bin. I've made some modification:
* in inmate/lib/arm-common/pci.c the #define PCI_CFG_BASE (0x48000000)
as defined in jetson-tx-ivshmem.c:
config.header.platform_info.pci_mmconfig_base.
In the same file i've enabled the print of pci_read/write_config
* in inmate/demos/arm/ivshmem-demo.c i've removed the filter on
class/revision in order to get a suitable pci device with proper
deviceId:vendorId
When the bare metal starts, it iterate on the memory with a lot of read
pci_read_config(bdf:0x0, addr:0x0000000000000000, size:0x2), reg_addr0x48000000
pci_read_config(bdf:0x1, addr:0x0000000000000000, size:0x2), reg_addr0x48000100
pci_read_config(bdf:0x2, addr:0x0000000000000000, size:0x2), reg_addr0x48000200
pci_read_config(bdf:0x3, addr:0x0000000000000000, size:0x2), reg_addr0x48000300
.... after a while something happens (follow <---)
IVSHMEM: Found 1af4:1110 at 07:10.0 <---
pci_read_config(bdf:0x780, addr:0x0000000000000008, size:0x4),
reg_addr0x48078008
IVSHMEM: class/revision ff010000, not supported skipping device <--- //IGNORED
pci_read_config(bdf:0x780, addr:0x0000000000000006, size:0x2),
reg_addr0x48078004
pci_read_config(bdf:0x780, addr:0x0000000000000034, size:0x1),
reg_addr0x48078034
IVSHMEM ERROR: device is not MSI-X capable <---
pci_read_config(bdf:0x780, addr:0x000000000000004c, size:0x4),
reg_addr0x4807804c
pci_read_config(bdf:0x780, addr:0x0000000000000048, size:0x4),
reg_addr0x48078048
pci_read_config(bdf:0x780, addr:0x0000000000000044, size:0x4),
reg_addr0x48078044
pci_read_config(bdf:0x780, addr:0x0000000000000040, size:0x4),
reg_addr0x48078040
IVSHMEM: shmem is at 0x000000007bf00000 <---
pci_write_config(bdf:0x780, addr:0x0000000000000014, value:0x0, size:0x4),
reg_addr0x48078014
pci_write_config(bdf:0x780, addr:0x0000000000000010, value:0x7c000000,
size:0x4), reg_addr0x48078010
IVSHMEM: bar0 is at 0x000000007c000000 <---
....
IVSHMEM: mapped shmem and bars, got position 0x0000000000000001 <---
IVSHMEM: Enabled IRQ:0x9b
IVSHMEM: Enabling IVSHMEM_IRQs
...
2nd problem:
At the end of devices scanning here is the error:
Unhandled data read at 0x10000(1)
FATAL: unhandled trap (exception class 0x24)
Cell state before exception:
pc: 0000000000001a80 lr: 0000000000001ac0 spsr: 20000005 EL1
sp: 0000000000003da0 esr: 24 1 1130007
x0: 0000000070006000 x1: 00000000000000ff x2: 0000000000002238
x3: ffffffffffffffff x4: 0000000000003de0 x5: 0000000000000002
x6: 0000000000000000 x7: 0000000000000008 x8: 0000000000003de8
x9: 0000000000000000 x10: 0000000000000000 x11: 0000000000002690
x12: 0000000000000000 x13: 0000000000000000 x14: 0000000000000020
x15: 0000000000000000 x16: 0000000000000000 x17: 0000000000000000
x18: 0000000000000000 x19: 00000000000000ff x20: 0000000000010000
x21: 0000000000001000 x22: 00000000000011b8 x23: 00000000ffffffd0
x24: 0000000000003f70 x25: 000000000000288b x26: 000000000000272c
x27: 0000000000000001 x28: 0000000000000780 x29: 0000000000000000
Parking CPU 3 (Cell: "jetson-tx1-demo-shmem")
Any suggestion?
Thanks in advance,
--Luca
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for gic-demo or uart-demo inmate on Nvidia Jetson TX1:
* 1 CPU, 64K RAM, serial port 0
*
* Copyright (c) Siemens AG, 2015
*
* Authors:
* Jan Kiszka <jan.kis...@siemens.com>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[3];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "jetson-tx1-demo-shmem",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
},
.cpus = {
0x8,
},
.mem_regions = {
/* UART */ {
.phys_start = 0x70006000,
.virt_start = 0x70006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM */ {
.phys_start = 0x17bfe0000,
.virt_start = 0,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* IVHSMEM */ {
.phys_start = 0x7bf00000,
.virt_start = 0x7bf00000,
/*.size = 0x1000,*/
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
},
.pci_devices = {
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0x0f << 3,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 2, /* must be no of IVSHMEM region above */
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
/*
* Jailhouse Jetson TX1 support
*
* Copyright (C) 2016 Evidence Srl
*
* Authors:
* Claudio Scordino <clau...@evidence.eu.com>
* Bruno Morelli <b.more...@evidence.eu.com>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* NOTE: Add "mem=3968M vmalloc=512M" to the kernel command line.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[43];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.hypervisor_memory = {
.phys_start = 0x17c000000,
.size = 0x4000000,
},
.debug_console = {
.address = 0x70006000,
.size = 0x0040,
.flags = JAILHOUSE_CON1_TYPE_8250 |
JAILHOUSE_CON1_ACCESS_MMIO |
JAILHOUSE_CON1_REGDIST_4 |
JAILHOUSE_CON2_TYPE_ROOTPAGE,
},
.platform_info = {
.pci_mmconfig_base = 0x48000000,
.pci_mmconfig_end_bus = 0x0,
.pci_is_virtual = 1,
.arm = {
.gicd_base = 0x50041000,
.gicc_base = 0x50042000,
.gich_base = 0x50044000,
.gicv_base = 0x50046000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "Jetson-TX1-ivshmem",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_irqchips = ARRAY_SIZE(config.irqchips),
},
},
.cpus = {
0xf,
},
.mem_regions = {
/* APE 1 */ {
.phys_start = 0x00000000,
.virt_start = 0x00000000,
.size = 0x00D00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* PCIE */ {
.phys_start = 0x01000000,
.virt_start = 0x01000000,
.size = 0x3F000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Data memory */ {
.phys_start = 0x040000000,
.virt_start = 0x040000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* host1x */ {
.phys_start = 0x50000000,
.virt_start = 0x50000000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Graphics Host */ {
.phys_start = 0x54000000,
.virt_start = 0x54000000,
.size = 0x3000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* GPU */ {
.phys_start = 0x57000000,
.virt_start = 0x57000000,
.size = 0x9000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Semaphores */ {
.phys_start = 0x60000000,
.virt_start = 0x60000000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Legacy Interrupt Controller (ICTRL) */ {
.phys_start = 0x60004000,
.virt_start = 0x60004000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* TMR */ {
.phys_start = 0x60005000,
.virt_start = 0x60005000,
.size = 0x01000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Clock and Reset */ {
.phys_start = 0x60006000,
.virt_start = 0x60006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Flow Controller */ {
.phys_start = 0x60007000,
.virt_start = 0x60007000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB-DMA */ {
.phys_start = 0x60008000,
.virt_start = 0x60008000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* System registers, secure boot, activity monitor */ {
.phys_start = 0x6000c000,
.virt_start = 0x6000c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* GPIOs + exception vectors */ {
.phys_start = 0x6000d000,
.virt_start = 0x6000d000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* IPATCH */ {
.phys_start = 0x60010000,
.virt_start = 0x60010000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* APB-DMA + VGPIO */ {
.phys_start = 0x60020000,
.virt_start = 0x60020000,
.size = 0x5000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MISC stuff (see datasheet) */ {
.phys_start = 0x70000000,
.virt_start = 0x70000000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* UARTs */ {
.phys_start = 0x70006000,
.virt_start = 0x70006000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* PWM Controller */ {
.phys_start = 0x7000a000,
.virt_start = 0x7000a000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* I2C + SPI*/ {
.phys_start = 0x7000c000,
.virt_start = 0x7000c000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RTC + PMC + FUSE + KFUSE */ {
.phys_start = 0x7000e000,
.virt_start = 0x7000e000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* Sensors */ {
.phys_start = 0x70010000,
.virt_start = 0x70010000,
.size = 0x0008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MC */ {
.phys_start = 0x70019000,
.virt_start = 0x70019000,
.size = 0x7000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SATA */ {
.phys_start = 0x70020000,
.virt_start = 0x70020000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* HDA */ {
.phys_start = 0x70030000,
.virt_start = 0x70030000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* CLUSTER CLOCK */ {
.phys_start = 0x70040000,
.virt_start = 0x70040000,
.size = 0x0040000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* XUSB */ {
.phys_start = 0x70090000,
.virt_start = 0x70090000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DDS */ {
.phys_start = 0x700a0000,
.virt_start = 0x700a0000,
.size = 0x0002000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SDMMCs */ {
.phys_start = 0x700b0000,
.virt_start = 0x700b0000,
.size = 0x5000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SPEEDO */ {
.phys_start = 0x700c0000,
.virt_start = 0x700c0000,
.size = 0x0008000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DP2 + APB2JTAG */ {
.phys_start = 0x700e0000,
.virt_start = 0x700e0000,
.size = 0x0002000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SOC_THERM */ {
.phys_start = 0x700e2000,
.virt_start = 0x700e2000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MIPI_CAL */ {
.phys_start = 0x700e3000,
.virt_start = 0x700e3000,
.size = 0x100,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SYSCTR0 */ {
.phys_start = 0x700f0000,
.virt_start = 0x700f0000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* SYSCTR1 */ {
.phys_start = 0x70100000,
.virt_start = 0x70100000,
.size = 0x0010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* DVFS */ {
.phys_start = 0x70110000,
.virt_start = 0x70110000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* APE 2 */ {
.phys_start = 0x702c0000,
.virt_start = 0x702c0000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* QSPI */ {
.phys_start = 0x70410000,
.virt_start = 0x70410000,
.size = 0x0001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* STM + CSITE */ {
.phys_start = 0x71000000,
.virt_start = 0x71000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB_A1 */ {
.phys_start = 0x78000000,
.virt_start = 0x78000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* AHB_A2 or USB */ {
.phys_start = 0x7c000000,
.virt_start = 0x7c000000,
.size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* System RAM */ {
.phys_start = 0x80000000,
.virt_start = 0x80000000,
.size = 0xfc000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVHSMEM */ {
.phys_start = 0x7bf00000,
.virt_start = 0x7bf00000,
/*.phys_start = 0x180000000,
.virt_start = 0x180000000,*/
.size = 0x100000,
/*.size = 0x1000,*/
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
},
},
.irqchips = {
/* GIC */ {
.address = 0x50041000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0x50041000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
{
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0x0f << 3,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 42,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
