On 10.07.19 06:57, Alejandro Largacha wrote: > Hello, > > I have been paying with jailhouse in a UltraZed SoM with AES-ZU-IOCC-G carrier > card from avnet. > So far, I have been able to enable the root cell, create a aremetal cell > where I > was able to load the baremetal > examples like gic-demo and a custom one where I was able to turn on some leds > via axi gpio in PL side. > > Now I'm trying to run an example where I can catch the interrupt from an axi > gpio in PL and I am not able to do that. > I'm using PL to PS interrupts in my design and the signal is being generated. > I > also tested with Xilinx SDK. > I tried with PS to PL group 0 and group 1. Irq numbers 121 and 136 and no > success. I don't know what I'm missing. > I attach the cells and the demo source. >
Your baremetal cell config is not permitting the cell access to the GIC interrupt 136 you are using. Replicate the irqchip entry and create bitmask where only bit 136 - 32 (32 is the base) is set. See also other examples in-tree, including those for the zcu102 or the ultra96. Both grant their non-root linux cells access to certain interrupts. Jan -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/a1ea8f98-2709-d789-8564-6c719b58526c%40siemens.com. For more options, visit https://groups.google.com/d/optout.
