On Mar 26, 1:16 pm, mattschinkel <[email protected]> wrote: > > That circuit is totally wrong and will give problems. > > Is the Jaluino schematic also wrong? > > Matt.
The Jaluino schematic will work, mostly but is inherently flawed. On my schematic holding reset doesn't affect the programmer.VPP/VPP on pin1 of ICSP. On Jaluino it shorts out the vpp supply. That could damage some programmers. On the Jaluino the VPP (+13V nominal) feeds the "reset" signal line. On my schematic, you can use junction of RC and push button for other devices and it's never more than VCC/VDD, Never the +10V to +15V possible from VPP (should be 12.5 to 13V) There is no capacitor on the Reset on the Jaluino, so not all devices will reset reliably, of course many PIC will, especially if power up timer is enabled. My circuit is more reliable slower delayed reset (tiime constant R2, C6) , yet re-enabled via D2 if a short glitch on power, so devices properly reset. Also isolated from VPP by D1, (or D2 would short VPP to VDD) and isolated from other devices using the reset. Ideally separate devices should have their own D2, R2 and C6 (my GLCD KS0108 does), and then if you want a common reset button, connect all resets to common point by 1N4148 diodes pointing at reset switch. For really really reliable you can get a dedicated IC that monitors PSU, has reset button, has capacitor for time constant, has brown out detector (resistor sets limit) and both active high *and* active low Reset/Enable signals. Some versions even have separates VCC/VDD switching and lithium coin cell input as well as PSU input, so you can reliably isolate power for RTC and avoid resets on selected devices etc. -- You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/jallib?hl=en.
