On Fri, Mar 26, 2010 at 11:18 AM, vasile surducan <[email protected]>wrote:
> > > On Fri, Mar 26, 2010 at 6:45 AM, mattschinkel <[email protected]>wrote: > >> You guys can check /trunk/doc/dita/tutorials/images/icsp_circuit.jpg >> >> But, I still think there should be a jumper in there at VDD. I am >> using PIC KIT 2 (clone) programmer now. The microchip software has a >> button to select weather to turn on 5v VDD. Other programmers do not >> have this in software so maybe it should be in hardware. >> >> I also took a look at Jaluino schematic and I see no capacitor for >> power-up reset, why is this? Is it not needed? >> > A capacitor is allowing current flow through it untill is completely charged. Once charged, the current flow is null. So, at power up, a logic low level will appears on MCLR giving an automatic reset. For another reset to appear, the capacitor must be completely discharged. Charging and discharging the capacitor connected from MCLR to GND is done via the pulled up resistor and through the impedance of VDD and GND. Both GND and VCC impedances are low as long the regulator is running (so the regulator has the right voltage at the input giving the right voltage at the output). An 100nF capacitor connected from GND to MCLR and another 10k resistor connected from MCLR to VCC, will give a maximum discharge time named here tau=3*R*C, which is 3mS. That means every glitch on the power supply must appear at longer intervals than 3mS for a correct reset occure. Assuming the board has a correct power supply with a corect chosen filtering capacitor, it is impossible to have less than 3mS glitches from manual power-up sequences. It may appear glitches lower than 3mS because of inductive loads, a foul user and so on. But in that situation the board will not work anyway because that glitches are corrupting everything. If instead of 100nF from MCLR to GND you are using a 10uF capacitor, than YES everything Mike said is correct and must be applied, because you have to discharge fast a large capacitor. Also for such high capacitance you need the series resistor between capacitor and MCLR pin, because of the huge ESD may appears pushing that reset button. Short circuit a charged 10uF capacitor and you'll see the flame. Vasile > >> http://www.justanotherlanguage.org/sites/default/files/jaluino_medium_v13a_schematic.png > > > Hi Matt, Mike, > > The reset through C10 and J7 is bullshit. > make R1 = 10k...33k so D1 can disappear, D1 is just for blocking current > flow from Vpp to Vdd. > put a 47nF to 100nF from MCLR to GND, near the PIC. > > With those will be OK. > > Vasile > > > >> >> >> Thanks, >> Matt. >> >> -- >> You received this message because you are subscribed to the Google Groups >> "jallib" group. >> To post to this group, send email to [email protected]. >> To unsubscribe from this group, send email to >> [email protected]<jallib%[email protected]> >> . >> For more options, visit this group at >> http://groups.google.com/group/jallib?hl=en. >> >> > -- You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/jallib?hl=en.
