Greetings, I like the new style myself - makes it easier to write libraries for new and old chips without cluttering up the code with 'if defined' statements.
William On Aug 29, 2:39 pm, funlw65 <[email protected]> wrote: > Well, now devices were modified but, It wasn't possible something like > this? > if defined(OPTION_REG) then > make the required alias inside library? > Adding a new register for devices which don't physically have it, will > not break some standards? > > Vasi > > On Aug 29, 9:22 pm, Rob Hamerling <[email protected]> wrote: > > > > > Hi Burt, > > > On 08/29/10 04:20 pm, Burt Ratliff wrote: > > > > There is no OPTION_REG It's called T0CON on the 18fchips I made a > > > copy of timer0_isr_interval > > > renamed it and clanged the naming it work find now for the 18fchips > > > You are right, but we were ahead of you! It is one of the changes of the > > soon to be released 0.6 version Jallib! But we have chosen for another > > approach: the device files of the midrange and baseline PICs have gotten > > aliases for OPTION_REG fields to mimic the existence of a T0CON > > register. So now a single timer0 library supports both the 18Fs aas > > well as the baseline and midrange PICs. > > > Regards, Rob. > > > -- > > R. Hamerling, Netherlands ---http://www.robh.nl -- You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/jallib?hl=en.
