Comment #6 on issue 140 by robhamerling: ADC & voltage configuration
support for 18F4620 (using PCFG *and* VCFG bits)
http://code.google.com/p/jallib/issues/detail?id=140
I sometimes forget that comments should be understood by others and are not
only my personal EEPROM.
After I changed the ADC-group of the extended midrange PICs (from ADC_V1 to
ADC_V0) the enable_digital_io() procedure sets the 3 low order bits of
ADCON1 to 0b000 (was 0b111). The 0b000 setting matches the (default)
settings for ADC_NVREF = 0. Comment 4 is only a confirmation that the
current ADC libraries work well with these PICs (without changes in the ADC
libraries).
Note: I have not committed the device files with this change yet! Willdo
soon.
Was this a bug in the device files? Yes and no!
Yes: The device files are supposed to present the PIC to the application in
its default power-on state (thus for example ADCCON1 = 0b0000_0000).
No: An application program may not assume the default power-on state
anymore after calling any procedure, even not enable_digital_io() in the
device file.
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