That's all well and good...if the circuit is simple enough to accomodate such a manual process.
When, like in my latest design, I had one component (microcontroller) with 100 pins, an Ethernet PHY chip with 64 pins and 4 ASICs with 44 pins each. That was only the 6 core components. There there were 2 bus connectors of 72 pins each and the associated glue logic. I think you get the idea. To complicate matters even more, several of the pins wuold change their functionality and direvtion depending upon configuration software/strapping. To manually inspect every single connection was just not feasible. Oh, add to it that sometimes things APPEAR to be connected when they are not. Greg ________________________________ From: David <[email protected]> To: [email protected] Sent: Wed, October 21, 2009 4:58:39 PM Subject: [kicad-users] ERC checks Hi, I read a lot of posts in this forum about ERC errors produced by EESchema ERC function. Why do people waste so much time trying to find out why EESchema produces these errors instead of relying on basic electrical first principles? When I'm drawing a schematic I set all pins that cause me problems (in EESchema) to passive. Instead I rely on a thorough study of any device data sheets and Kirchoffs laws/electrical principles. I can understand if someone has not had any electronics training/experience but surely the designer of the circuit, i.e you, have a better understanding of how things should be connected. Sorry for the rant. David. ------------------------------------ Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
