Note snipped history for these comments.... I have a serious gripe about the whole alignment thing as far as eeschema is concerned, as well as some comments on cut and paste, X's etc.
1) there is no need to have ERC to fix alignment issues as far as I am concerned. Alignment issues for this case are defined as pins/wires that look connected but are not. THIS IS A BUG in the editor. Before flaming please read on. There are conventions as to how schematics look. The basic conventions are that lines which T are connected, and lines which cross are not, EXCEPT, when there is a filled junction. A more obvious, but not explicitly stated rule is that things which look continuous ARE continuous. We use a grid for schematics. The grid is symbolic, not physical, so there is very little reason to mess with it. While there are good reasons for allowing non-manhattan geometry, there are NOT good reasons for allowing off-grid geometry. Thus the point of ERC is MOOT. It should be impossible to create, and thus impossible to ERC an alignment issue. The fact that other programs (like orcad) didn't fix this is not justification to allow this annoyance to continue. There are lots of implications to this, such as wiring past a component automatically places a junction etc. In my experience these behaviors are expected, and thus fine.... the alternatives are not expected and cause problems. 2) As for the other ERC issues, The general "ERC" problem is an unbounded one. As mentioned, there are voltage limits, termination, io direction, etc. To have everything checked is impossible, as it requires knowledge about the function of the components, so its important to allow enough flexibility to let people do the basic stuff easily ( which I think includes the basic IO stuff only, and no fanout), and then allow hooks for the rest. Otherwise, it just gets insane in a hurry. > Checking that global labels are used on more than one page can help > catch this. Checking to see if a global label is used more than once > on a page can help save you from cut and paste errors. Checking to > see that all pins are connected properly to nets (or have Xs on them) > can help save you from slight alignment errors on the schematic sheet. > My ERC will do all these things, and the built-in one will do some of > them. > > Regards, > Pat >
