I often have to work with MLF/QFN devices, which have a thermal pad on 
the bottom.   There are two considerations here.   Firstly there is the 
heatsinking requirement, and secondly if you get the copper design wrong 
the chip will float on a central blob of solder, resulting in unreliable 
soldering of the pins.

For the thermal pad footprint for a 32 pin device I arrange 8 square 
pads around a central via, and I place solder resist over the via.   I 
number all the (thermal) pads as "33", so I only end up with one extra 
pin in eeschema.   I connect together the pads and the via with a grid 
of thick tracks.   The use of a tented via in this way means that the 
via will be solidly connected to the heatsinking copper zone on the 
reverse side, whilst the tenting prevents solder wicking through the 
via.   This arrangement has worked well for me.

An alternative arrangement might be to use nine untented vias with very 
small drill holes in the same pattern.   This would give better thermal 
contact between board and component, but I don't know how small the 
holes would have to be to prevent solder wicking, or whether they would 
end up so small that their heat transfer capability would be 
compromised.   If that were the case I guess you could use more vias 
with a smaller annulus.   However, whilst I would be interested to know 
if this is a better method, I've no idea what size the holes would have 
to be, I don't have the means to do the necessary experimentation, and 
the arrangement I use currently works well enough for me.

Regards,

Robert.

On 15/05/2010 22:30, Karl Schmidt wrote:
> Today, there are many surface mount parts (MOSFETS, driver-chips etc.) that 
> depend on a solid copper
> connection to aid in dissipating heat. Those pins should not have a thermal 
> created to a ground
> plane.  What is the best way to prevent the generation of this thermal?
>
> ( I think this should be an attribute of a pin type in eeschema - but it 
> isn't there .. there might
> have been a 'T' attribute in PADS - might have been in the pad-stack 
> definition? - if memory serves
> me right.  I think it could default to T unless told not to do so).
>
>
> I think I can create a zone with thermals turned off - and kludge it up to 
> work.
>
> This wasn't much of an issue in the past, but is rather common with the SM 
> boards of today -
> probably should have some way to do this..
>
> I want to write this up..
>
> --------------------------------------------------------------------------------
> Karl Schmidt                                  EMail [email protected]
> Transtronics, Inc.                              WEB http://xtronics.com
> 3209 West 9th Street                             Ph (785) 841-3089
> Lawrence, KS 66049                              FAX (785) 841-0434
>
> Action speaks louder than words but not nearly as often. -- Mark Twain
>
> --------------------------------------------------------------------------------
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