Bob La Quey wrote:
IMHO it is a real pity that these architectures have not gotten
an commerical traction.
Quoting...
"""
Using a realistic match of processor speed and affordable memory speed,
most processors can perform two internal stack operations in the time it
takes for a single memory access.
"""
I'm not sure what "realistic" means to the author, but...
At a 3GHz clock on a Pentium and a ~500MHz memory cycle time on desktop
computers, I suspect this architecture is better suited to embedded
devices. Generally, modern CPUs can blow the pants off a gigabyte-size
memory, speed-wise. RISC machines don't need a lot of registers or long
pipelines of the memory is clocked as fast as the CPU is.
--
Darren New / San Diego, CA, USA (PST)
His kernel fu is strong.
He studied at the Shao Linux Temple.
--
[email protected]
http://www.kernel-panic.org/cgi-bin/mailman/listinfo/kplug-lpsg
