On Wednesday, 12/10/2003 at 11:12 PST, "Wolfe, Gordon W" <[EMAIL PROTECTED]> wrote: > On a microcoded machine, megahertz numbers are totally useless. They're > useless in general anyway because an instruction may take one, or two, or many > clock cycles. With level-two and level-three cache and internal queueing an > Intel microprocessor can take as many as 13-17 clock cycles from fetch to > execution of some instructions. RISC-based processors, such as the current IBM > PPC chip, average about three. Microcoded processors, who knows?
And in each generation the pipelining abilities get better and better. For those who aren't up on the latest in processor design, "pipelining" is a way for the CPU to actually execute more than one instruction (or parts of a multi-cycle instruction) a single clock cycle. Optimizing compilers can build instruction streams suited to the capabilities of a particular processor, throwing the relationship between instruction execution and cycle time (MHz) out the window. You could end up with a 1GHz CPU executing instructions as though it were, say, 1.3GHz. (I'm making those numbers up.) But it would be misleading if we pushed that *too* hard because of the large amount of legacy (i.e. compiled last week) apps that wouldn't be optimized to take full advantage of it. (You usually get some exploitation for free.) Alan Altmark Sr. Software Engineer IBM z/VM Development
