Alan, I'd take one small exception. you don't need to be up on the "latest in processor design", i'm pretty sure pipeline technology shipped as part of the early 370 series, at least i remember studying it in the 70's. (158/168 if anyone remembers?).
>From: Alan Altmark <[EMAIL PROTECTED]> > > >And in each generation the pipelining abilities get better and better. > >For those who aren't up on the latest in processor design, >"pipelining" is a way for the CPU to actually execute more than >one instruction (or parts of a multi-cycle instruction) a single >clock cycle. Optimizing compilers can build instruction streams >suited to the capabilities of a particular processor, throwing >the relationship between instruction execution and cycle time >(MHz) out the window. You could end up with a 1GHz CPU executing >instructions as though it were, say, 1.3GHz. (I'm making those >numbers up.) > >But it would be misleading if we pushed that *too* hard because >of the large amount of legacy (i.e. compiled last week) apps >that wouldn't be optimized to take full advantage of it. (You >usually get some exploitation for free.) > >Alan Altmark >Sr. Software Engineer >IBM z/VM Development "If you can't measure it, I'm Just NOT interested!"(tm) /************************************************************/ Barton Robinson - CBW Internet: [EMAIL PROTECTED] Velocity Software, Inc Mailing Address: 196-D Castro Street P.O. Box 390640 Mountain View, CA 94041 Mountain View, CA 94039-0640 VM Performance Hotline: 650-964-8867 Fax: 650-964-9012 Web Page: WWW.VELOCITY-SOFTWARE.COM /************************************************************/
