LDM & STM

[Adam 'WeirdArms' Wiggins]

        Would the following instruction use the user_sp or the svc_sp as
the base register if run in svc mode:

        stmdb   sp, {sp, lr}^                   @ Stack usr_sp, usr_lr

likewise for the ldmia companion. The ARM ARM seems a little vague on the
issue.

        All help apreciated, Adam

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