Add TC2 cpu capacity information.

Cc: Liviu Dudau <liviu.du...@arm.com>
Cc: Sudeep Holla <sudeep.ho...@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Rob Herring <robh...@kernel.org>
Cc: Pawel Moll <pawel.m...@arm.com>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Ian Campbell <ijc+devicet...@hellion.org.uk>
Cc: Kumar Gala <ga...@codeaurora.org>
Cc: Russell King <li...@arm.linux.org.uk>
Cc: devicet...@vger.kernel.org
Signed-off-by: Juri Lelli <juri.le...@arm.com>
Acked-by: Sudeep Holla <sudeep.ho...@arm.com>
---

Changes from v1:
  - capacity-scale removed

Changes from v4:
  - binding changed to capacity-dmips-mhz

Changes from v6:
  - s/binding// in changelog
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts 
b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 0205c97efdef..45d08cc37b01 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -39,6 +39,7 @@
                        reg = <0>;
                        cci-control-port = <&cci_control1>;
                        cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+                       capacity-dmips-mhz = <1024>;
                };
 
                cpu1: cpu@1 {
@@ -47,6 +48,7 @@
                        reg = <1>;
                        cci-control-port = <&cci_control1>;
                        cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+                       capacity-dmips-mhz = <1024>;
                };
 
                cpu2: cpu@2 {
@@ -55,6 +57,7 @@
                        reg = <0x100>;
                        cci-control-port = <&cci_control2>;
                        cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+                       capacity-dmips-mhz = <516>;
                };
 
                cpu3: cpu@3 {
@@ -63,6 +66,7 @@
                        reg = <0x101>;
                        cci-control-port = <&cci_control2>;
                        cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+                       capacity-dmips-mhz = <516>;
                };
 
                cpu4: cpu@4 {
@@ -71,6 +75,7 @@
                        reg = <0x102>;
                        cci-control-port = <&cci_control2>;
                        cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+                       capacity-dmips-mhz = <516>;
                };
 
                idle-states {
-- 
2.10.0

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