On 10/12/26 5:24 PM, Alex Elder wrote: > The TC9564 SoC has a single 25 MHz fixed-rate input clock. Add it > to the definition associated with the chip. > > Co-developed-by: Daniel Thompson <[email protected]> > Signed-off-by: Daniel Thompson <[email protected]> > Signed-off-by: Alex Elder <[email protected]> > --- > v3: - New patch in this version of the series > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 0e3bbdaf4661f..b8d290eed2f38 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -891,6 +891,12 @@ pcie@0,0 { > pinctrl-0 = <&tc9563_resx_n>; > pinctrl-names = "default"; > > + clock-25000000 { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <25000000>; > + };
This and patch 4 should be squashed Konrad
