Hi,
On Thu, 16 May 2019 at 03:27, Andre Przywara <[email protected]> wrote:
>
> The first USB controller on the H6 SoC shares a PHY with the OTG
> controller. Reportedly to avoid problems with the VBUS regulator under
> Linux, we don't link OHCI0/EHCI0 to the USB PHY in the H6 .dtsi file.
>
> However on boards which can't use peripheral mode (because they have an
> always-on VBUS supply on an USB-A socket) we don't need this trick, and
> can properly connect host controller 0 to the PHY 0.
>
> Amend the Pine H64 .dts to reflect this. This enables the upper USB port
> in U-Boot on this board.
>
> Signed-off-by: Andre Przywara <[email protected]>
> ---
> arch/arm/dts/sun50i-h6-pine-h64.dts | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts
> b/arch/arm/dts/sun50i-h6-pine-h64.dts
> index 4802902e12..aad7646b18 100644
> --- a/arch/arm/dts/sun50i-h6-pine-h64.dts
> +++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
> @@ -96,6 +96,8 @@
> };
>
> &ehci0 {
> + phys = <&usb2phy 0>;
> + phy-names = "usb";
> status = "okay";
> };
>
> @@ -120,6 +122,8 @@
> };
>
> &ohci0 {
> + phys = <&usb2phy 0>;
> + phy-names = "usb";
> status = "okay";
> };
>
> @@ -255,7 +259,6 @@
>
> &usb2otg {
> dr_mode = "host";
> - status = "okay";
> };
Maybe you should add explicit comments in the device-tree to avoid
losing this at next sync with linux dt.
Regards,
Clement
>
> &usb2phy {
> --
> 2.14.5
>
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