On Sat, Oct 17, 2026 at 4:03 PM Roman Storozhenko <[email protected]> wrote: > > On Fri, Oct 16, 2026 at 4:38 PM Steven Rostedt <[email protected]> wrote: > > > > > > [ > > I realized I replied to v2 and not v4 as the thread of v2 pushed that to > > the top. I'll repeat my statement here too. > > ] > > > > On Thu, 15 Oct 2026 19:32:34 +0200 > > Roman 'Hedin' Storozhenko <[email protected]> wrote: > > > > > diff --git a/include/trace/events/riscv_tlb.h > > > b/include/trace/events/riscv_tlb.h > > > > Please do not put architecture specific events in include/trace. > > > > They belong in the architecture. > > > > See the example code in samples/trace_events/trace-events-sample.[ch] > > as well as the Makefile there on how to put trace events in directories > > outside of include/trace/ > > > > Thanks, > > > > -- Steve > > > > Hi Steve, > > Thanks for the review. > > I've moved the trace event definition to > arch/riscv/include/asm/riscv_tlb.h in v5, following the existing > RISC-V tracepoint convention. > > The updated patch is available here: > https://lore.kernel.org/linux-riscv/[email protected]/ > > Thanks for pointing this out.
Hi Steve, A quick update: I've posted v6 with an additional fix for the alignment of the dynamically stored CPU mask. The trace event definition remains under arch/riscv/include/asm/riscv_tlb.h, as in v5. The updated patch is available here: https://lore.kernel.org/linux-riscv/[email protected]/T/#u > -- > Kind regards, > Roman 'Hedin' Storozhenko -- Kind regards, Roman 'Hedin' Storozhenko
