Alan Stern wrote:
The first restriction is that some architectures (which ones? -- I don't
know) are unable to perform DMA to addresses on the stack. So all I/O
buffers _must_ be allocated using kmalloc() or something similar; they
_cannot_ be automatic local variables. (What about static allocation?)
Static allocation isn't allowed either. See DMA-mapping.txt for
the most complete description of the rules about what memory you
may use for DMA.
If these two restrictions are obeyed then things will work correctly. But
there are additional considerations involving efficiency. Each time an
input operation completes, a cache miss necessarily occurs the first time
the CPU tries to read the data.
Not "necessarily". There are cache architectures, ISTR,
with coherency protocols that allow writers other than
the CPU (like DMA!) to update cache(s). I don't recall
how common they are ... but at any rate, you should never
expect reads to be satisfied from cache.
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