On Fri, 6 Jun 2003, David Brownell wrote: > Alan Stern wrote: > > > > The first restriction is that some architectures (which ones? -- I don't > > know) are unable to perform DMA to addresses on the stack. So all I/O > > buffers _must_ be allocated using kmalloc() or something similar; they > > _cannot_ be automatic local variables. (What about static allocation?) > > Static allocation isn't allowed either. See DMA-mapping.txt for > the most complete description of the rules about what memory you > may use for DMA. > > > > > If these two restrictions are obeyed then things will work correctly. But > > there are additional considerations involving efficiency. Each time an > > input operation completes, a cache miss necessarily occurs the first time > > the CPU tries to read the data. > > Not "necessarily". There are cache architectures, ISTR, > with coherency protocols that allow writers other than > the CPU (like DMA!) to update cache(s). I don't recall > how common they are ... but at any rate, you should never > expect reads to be satisfied from cache.
I stand corrected. Is it true to say that (unless one uses usb_buffer_alloc() or something similar) the recommendations in my earlier post are accurate? Alan Stern ------------------------------------------------------- This SF.net email is sponsored by: Etnus, makers of TotalView, The best thread debugger on the planet. Designed with thread debugging features you've never dreamed of, try TotalView 6 free at www.etnus.com. _______________________________________________ [EMAIL PROTECTED] To unsubscribe, use the last form field at: https://lists.sourceforge.net/lists/listinfo/linux-usb-devel
