P.19 and p.91 of the isp116x datasheet mention the 167ns pulse (although it seems to be relating to int2 there I am assuming the pulse length would be the same?) - of note there seems to also be mention of a register to switch between pulse and level signal modes for this interrupt. I am not sure if this is the same for int1 or not.
I cannot find anywhere mention of a 1000ms pulse assertion time for detection on the PXA250. It is not mentioned in the general pxa250 datasheet. The datasheets of my specific hardware are not very comprehensive (4 pages) and do not have much detailed information however I can e-mail you those if you think they would help you? Maybe because the Isp1161/PXA are using the start of frame interrupts to keep track of the packet frame number every 1ms, the processor cannot cope? I would have thought it would be fast enough however. Dom -----Original Message----- From: okazaki [mailto:[EMAIL PROTECTED] Sent: 06 September 2004 15:36 To: Dominic Evans Subject: Re: isp1161 ISOC timeout problems Hi Dominic Evans. >//this chip (isp116x) gives a pulse of 167ns on the interrupt, pxa250 >requires 1000ns Can I read your Proccesor datasheet of this spec? Adsynori ----- Original Message ----- From: "Dominic Evans" <[EMAIL PROTECTED]> To: <[EMAIL PROTECTED]> Sent: Monday, September 06, 2004 11:02 PM Subject: RE: isp1161 ISOC timeout problems http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2003-March/0143 76.html ^ that thread has the information. I don't have oscilliscope to examine the pulse length unfortunately. I don't know what else would be causing interrupts to be lost otherwise. Dominic -----Original Message----- From: okazaki [mailto:[EMAIL PROTECTED] Sent: 06 September 2004 14:56 To: Dominic Evans Subject: Re: isp1161 ISOC timeout problems Hi Dominic Evans. >//this chip (isp116x) gives a pulse of 167ns on the interrupt, pxa250 >requires 1000ns //so you must use level triggered for pxa250 or extra >hardware to extend the pulse It sounds JOKE to me. Because SOF intterupt generates every 1m second(= 1000ns). That is, interrupt signal is not stay LOW LEVEL. Is it really? Adsynori ------------------------------------------------------- This SF.Net email is sponsored by BEA Weblogic Workshop FREE Java Enterprise J2EE developer tools! Get your free copy of BEA WebLogic Workshop 8.1 today. http://ads.osdn.com/?ad_idP47&alloc_id808&op=click _______________________________________________ [EMAIL PROTECTED] To unsubscribe, use the last form field at: https://lists.sourceforge.net/lists/listinfo/linux-usb-devel
