On Thu, Sep 08, 2022 at 01:56:59PM +0200, Luigi 'Comio' Mantellini wrote: > - How is the 1PPS driven? Is there any reclocking logic? You need to ask > your FPGA-experts.
+1 The circuit the produces the 1 PPS could well delay the signal by ten or more nanoseconds. Thanks, Richard _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
