Dear All,

Before creating confusion, I propose the following workflow.

- Be confident about your test bench
[ ] If you are using an external clock source (provided to Calnex), check
the rising-edge of 1PPS signal between your clock source and the Calnex
using an oscilloscope. Is it aligned? If not, you cannot be confident
regarding Calnex or the oscilloscope.
[ ] Still using the oscilloscope, compare the Calnex 1PPS monitor with your
DUT (Device Under Test) 1PPS output. If OK, probability you write a wrong
Cable Delay in Calnex setup.
[ ] Measure the cable delay using an oscilloscope with two probes and a
square generator with two identical outputs.

- DUT
[ ] Validate PPPoETH performance. You should evaluate the timestamps on
RX/TX directions to be sure that asymmetries are close 0ns. Calnex offers
the two way graphs to accomplish this task.
[ ] Validate 1PPS performance. Check again the Cable Delay.
[ ] If you have a (huge) delay, your 1PPS output is inserting propagation
delay => You need to reclock 1PPS and compensate the output adding a
negative offset
[ ] If your signal anticipate the calnex (negative offset), your 1PPS
output is already reclocked an you need to better estimate the compensation
value to put into the registers.

This is my workflow... I hope to be useful to you.

ciao

luigi




Il giorno ven 9 set 2022 alle ore 04:53 Richard Cochran <
richardcoch...@gmail.com> ha scritto:

> On Fri, Sep 09, 2022 at 08:45:19AM +0800, Hamilton Alex wrote:
> > Hi, Richard:
> > I am not quite understand.  I am using Calnex master-->board slave, if
> the
> > linuxptp print out is correct, that means local clock
> > has the same frequency and phase as master clock,  then the 1PPS out
> should
> > near the reference 1PPS.
> >
> > why path asymmetry would affect the 1PPS out?
>
> You reported a 40 nanosecond phase offset.
>
> One possible cause is path asymmetry.  The PTP assumes the Tx and Rx
> transmission delays are exactly equal.  However, this is almost never
> true.
>
> Any real asymmetry results in a phase offset that is uncorrectable by
> the PTP.
>
> Because your 40 ns phase offset is very small, you might very well
> have path asymmetry somewhere in your system.  For example, your PHY
> might delay frames longer on Tx than on Rx.
>
> HTH,
> Richard
>
>
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>


-- 
*Luigi 'Comio' Mantellini*
My Professional Profile <http://www.linkedin.com/in/comio>

*"UNIX is very simple, it just needs a genius to understand its
simplicity." [cit.]*
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