================ @@ -0,0 +1,36 @@ +//=== SparcInstrUAOSA.td - UltraSPARC/Oracle SPARC Architecture extensions ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file contains instruction formats, definitions and patterns needed for +// UA 2005 instructions on SPARC. +//===----------------------------------------------------------------------===// + +// UltraSPARC Architecture 2005 Instructions +let Predicates = [HasUA2005] in { +let hasSideEffects = 1 in +def ALLCLEAN : InstSP<(outs), (ins), "allclean", []> { ---------------- koachan wrote:
Yeah, it seems to be F3_1 but with anything past `op3` set to zero. https://github.com/llvm/llvm-project/pull/138400 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
