================
@@ -152,13 +155,15 @@ def : Proc<"ultrasparc3", [FeatureV9,
FeatureV8Deprecated, FeatureVIS,
FeatureVIS2],
[TuneSlowRDPC]>;
def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated, FeatureVIS,
- FeatureVIS2]>;
+ FeatureVIS2, FeatureUA2005]>;
def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated, UsePopc,
- FeatureVIS, FeatureVIS2]>;
+ FeatureVIS, FeatureVIS2, FeatureUA2005]>;
def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated, UsePopc,
- FeatureVIS, FeatureVIS2, FeatureVIS3]>;
+ FeatureVIS, FeatureVIS2, FeatureVIS3,
+ FeatureUA2005]>;
def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated, UsePopc,
- FeatureVIS, FeatureVIS2, FeatureVIS3]>;
+ FeatureVIS, FeatureVIS2, FeatureVIS3,
+ FeatureUA2005]>;
----------------
s-barannikov wrote:
Can you point me to the documentation or other resources where I can make sure
these processors support these instructions?
https://github.com/llvm/llvm-project/pull/138400
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