================ @@ -0,0 +1,28 @@ +//=== SparcInstrUAOSA.td - UltraSPARC/Oracle SPARC Architecture extensions ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file contains instruction formats, definitions and patterns needed for +// UA 2005 instructions on SPARC. +//===----------------------------------------------------------------------===// + +class UA2005RegWin<string asmstr, bits<5> fcn> + : F3_1<2, 0b110001, (outs), (ins), asmstr, []> { + let rd = fcn; + let rs1 = 0; + let rs2 = 0; ---------------- s-barannikov wrote:
The body is usually indented by 2 (the colon should still be indented by 4): ```suggestion let rd = fcn; let rs1 = 0; let rs2 = 0; ``` https://github.com/llvm/llvm-project/pull/138400 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
