https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/196785
>From a64d5045d38304a5c89ac91be886f788d1fa394e Mon Sep 17 00:00:00 2001 From: Iris Shi <[email protected]> Date: Sun, 10 May 2026 15:09:16 +0800 Subject: [PATCH 1/3] [SelectionDAG] Drop unnecessary lower bound check in lowerRangeToAssertZExt --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 ++++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3d65c82f051a8..14bf2b704c4da 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -16213,6 +16213,10 @@ SDValue DAGCombiner::visitAssertExt(SDNode *N) { AssertVT == cast<VTSDNode>(N0.getOperand(1))->getVT()) return N0; + // fold (assert?ext c, vt) -> c + if (isa<ConstantSDNode>(N0)) + return N0; + if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse() && N0.getOperand(0).getOpcode() == Opcode) { // We have an assert, truncate, assert sandwich. Make one stronger assert diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 68ae86d8d561f..5753d74168e59 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -10852,10 +10852,6 @@ SDValue SelectionDAGBuilder::lowerRangeToAssertZExt(SelectionDAG &DAG, if (!CR || CR->isFullSet() || CR->isEmptySet() || CR->isUpperWrapped()) return Op; - APInt Lo = CR->getUnsignedMin(); - if (!Lo.isMinValue()) - return Op; - APInt Hi = CR->getUnsignedMax(); unsigned Bits = std::max(Hi.getActiveBits(), static_cast<unsigned>(IntegerType::MIN_INT_BITS)); >From c746a44876d03946466c1a58083a4525b3227b02 Mon Sep 17 00:00:00 2001 From: Iris Shi <[email protected]> Date: Sun, 10 May 2026 15:40:03 +0800 Subject: [PATCH 2/3] add test --- llvm/test/CodeGen/X86/call-range-attr.ll | 74 ++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 llvm/test/CodeGen/X86/call-range-attr.ll diff --git a/llvm/test/CodeGen/X86/call-range-attr.ll b/llvm/test/CodeGen/X86/call-range-attr.ll new file mode 100644 index 0000000000000..7939e08f84cb2 --- /dev/null +++ b/llvm/test/CodeGen/X86/call-range-attr.ll @@ -0,0 +1,74 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s + +declare i64 @returns_i64() + +define i64 @call_range_nonzero_lo() nounwind { +; CHECK-LABEL: call_range_nonzero_lo: +; CHECK: # %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: callq returns_i64@PLT +; CHECK-NEXT: movabsq $2305843009213693944, %rcx # imm = 0x1FFFFFFFFFFFFFF8 +; CHECK-NEXT: andq %rcx, %rax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq + %v = call range(i64 1, 2305843009213693952) i64 @returns_i64() + %r = and i64 %v, 2305843009213693944 + ret i64 %r +} + +define i64 @call_range_zero_lo() nounwind { +; CHECK-LABEL: call_range_zero_lo: +; CHECK: # %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: callq returns_i64@PLT +; CHECK-NEXT: andl $-8, %eax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq + %v = call range(i64 0, 256) i64 @returns_i64() + %r = and i64 %v, 248 + ret i64 %r +} + +define i64 @call_range_narrow() nounwind { +; CHECK-LABEL: call_range_narrow: +; CHECK: # %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: callq returns_i64@PLT +; CHECK-NEXT: andl $248, %eax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq + %v = call range(i64 100, 256) i64 @returns_i64() + %r = and i64 %v, 248 + ret i64 %r +} + +; Negative tests + +define i64 @call_no_range() nounwind { +; CHECK-LABEL: call_no_range: +; CHECK: # %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: callq returns_i64@PLT +; CHECK-NEXT: movabsq $2305843009213693944, %rcx # imm = 0x1FFFFFFFFFFFFFF8 +; CHECK-NEXT: andq %rcx, %rax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq + %v = call i64 @returns_i64() + %r = and i64 %v, 2305843009213693944 + ret i64 %r +} + +define i64 @call_wrapped_range() nounwind { +; CHECK-LABEL: call_wrapped_range: +; CHECK: # %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: callq returns_i64@PLT +; CHECK-NEXT: movabsq $2305843009213693944, %rcx # imm = 0x1FFFFFFFFFFFFFF8 +; CHECK-NEXT: andq %rcx, %rax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq + %v = call range(i64 -100, 100) i64 @returns_i64() + %r = and i64 %v, 2305843009213693944 + ret i64 %r +} >From 310084a820e9c5b084c7c32b04d70d2a013cd4ae Mon Sep 17 00:00:00 2001 From: Iris Shi <[email protected]> Date: Sun, 10 May 2026 15:40:49 +0800 Subject: [PATCH 3/3] update test Co-Authored-By: nikic <[email protected]> --- llvm/test/CodeGen/X86/call-range-attr.ll | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/llvm/test/CodeGen/X86/call-range-attr.ll b/llvm/test/CodeGen/X86/call-range-attr.ll index 7939e08f84cb2..80e03e91d12dc 100644 --- a/llvm/test/CodeGen/X86/call-range-attr.ll +++ b/llvm/test/CodeGen/X86/call-range-attr.ll @@ -8,8 +8,7 @@ define i64 @call_range_nonzero_lo() nounwind { ; CHECK: # %bb.0: ; CHECK-NEXT: pushq %rax ; CHECK-NEXT: callq returns_i64@PLT -; CHECK-NEXT: movabsq $2305843009213693944, %rcx # imm = 0x1FFFFFFFFFFFFFF8 -; CHECK-NEXT: andq %rcx, %rax +; CHECK-NEXT: andq $-8, %rax ; CHECK-NEXT: popq %rcx ; CHECK-NEXT: retq %v = call range(i64 1, 2305843009213693952) i64 @returns_i64() @@ -35,7 +34,7 @@ define i64 @call_range_narrow() nounwind { ; CHECK: # %bb.0: ; CHECK-NEXT: pushq %rax ; CHECK-NEXT: callq returns_i64@PLT -; CHECK-NEXT: andl $248, %eax +; CHECK-NEXT: andl $-8, %eax ; CHECK-NEXT: popq %rcx ; CHECK-NEXT: retq %v = call range(i64 100, 256) i64 @returns_i64() _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
