On 01/25/2015 04:08 PM, Petr Machata wrote: > Faraz Shahbazker <[email protected]> writes: > >> On 01/21/2015 02:44 PM, Petr Machata wrote: >>> So it seems to me this logic should be folded into mips_next_pcs, and >>> only activated when the stepped-over instruction is an LL. >> ... >>> I think ltrace currently support two breakpoints for software >>> singlestep. So you put one just after the SC, and one extra is >>> available for when there's a jump between LL and SC. If there are more >>> jumps, we just don't have a good answer for that. PowerPC just gives up >>> and returns SWS_FAIL, which should at least clean up things and get >>> ltrace into the right states. >> >> PPC sets breakpoints at branch destination for all branches within the >> atomic sequence and relies on the call-back to handle more than 1 >> jumps as an error. If we fold the atomic logic in to mips_next_pc, >> we'd have to remove checks on (nr <= 2) from mips_next_pc and allow it >> to return more than 2 addresses. Does this sound reasonable? > > IIRC, the limit of 2 is taken from GDB, where the PPC > software-singlestepping code is lifted from. I think it's arbitrary, > very probably it's just empirical upper bound of code found in practice. > Clearly in theory, there can be more than one jump between LL and SC, > but does it come up in practice at all?
As far as the linker code for MIPS is concerned I don't even see a single jump. Any atomic sequence that has a branch can be written as 2 shorter sequences with the branch decision performed earlier. Besides, we always want atomics to be as short as possible. So no, I don't expect this to come up in practice. Perhaps, I wasn't clear earlier. My intention is just to remove the check for (nr <= 2) from mips_next_pc(), not to allow more than 2 breakpoints as a general case. Since the existence of more than 2 breakpoints is eventually checked by sw_singlestep_add_bp(), enforcing the limitation in mips_next_pc is not strictly necessary. So the options are: 1. keep the atomic sequence logic in arch_sw_singlestep(), as it is currently for PPC 2. move atomic logic to mips_next_pc() and remove the restriction on (nr <= 2) from mips_next_pc() Regards, Faraz Shahbazker _______________________________________________ Ltrace-devel mailing list [email protected] http://lists.alioth.debian.org/cgi-bin/mailman/listinfo/ltrace-devel
