Hi Tom, I was thinking about that. It may well work with CP/m or if not exactly this patch then maybe a minor variant. The m100 main rom provides all of these routines for cp/m.
Cp/m always powers up as an M100 but the upper ram image would need to have the one location that stores page state to be zeroed out. That upper ram image is bundled into the cpm image that is loaded from disk. So i think what is needed is to just poke a 0 into that spot in the file on disk, or run a little utility on start of cp/m. Steve On Wednesday, February 23, 2022, Tom Hoppe <tjho...@gmail.com> wrote: > Could this work with CP/M? > > On Wed, Feb 23, 2022 at 7:48 AM Joshua O'Keefe <maj...@nachomountain.com> > wrote: > >> > On Feb 23, 2022, at 7:17 AM, Stephen Adolph <twospru...@gmail.com> >> wrote: >> > I did a write up on the two patches that are needed. >> >> Steve, I remember seeing you mention this a while back and I'm glad you >> were able to get back to it. Your write-up was clear, informative and >> interesting. Thanks for sharing it. >> >> I wonder why this controller feature was never exploited. Was there >> perhaps a similar, earlier part lacking the feature that was swapped out >> late in the design cycle? Simple time constraints like every engineer in >> history has faced? I can imagine all kinds of scenarios and it's a shame >> we'll never know the real story of why the ROM is the way it is. > >
