From: Austin Hu <austin...@intel.com>
Original frame buffer size is limited to 2048x2048 when
initializing drm_mode_config, but each Display Plane
A/B/C can support up to 2048x2048 FB on Penwell.
Fixed it by extending the FB size with current CRTC number.
Signed-off-by: Austin Hu <austin...@intel.com>
Signed-off-by: Hitesh K. Patel <hitesh.k.pa...@intel.com>
---
drivers/staging/mrst/drv/psb_drv.h | 3 +++
drivers/staging/mrst/drv/psb_fb.c | 5 +++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/mrst/drv/psb_drv.h
b/drivers/staging/mrst/drv/psb_drv.h
index 159b4e1..fbcfa3f 100644
--- a/drivers/staging/mrst/drv/psb_drv.h
+++ b/drivers/staging/mrst/drv/psb_drv.h
@@ -287,6 +287,9 @@ enum panel_type {
#define PSB_PCIx_MSI_ADDR_LOC 0x94
#define PSB_PCIx_MSI_DATA_LOC 0x98
+#define MDFLD_PLANE_MAX_WIDTH 2048
+#define MDFLD_PLANE_MAX_HEIGHT 2048
+
struct opregion_header;
struct opregion_acpi;
struct opregion_swsci;
diff --git a/drivers/staging/mrst/drv/psb_fb.c
b/drivers/staging/mrst/drv/psb_fb.c
index d9a66fb..6964978 100644
--- a/drivers/staging/mrst/drv/psb_fb.c
+++ b/drivers/staging/mrst/drv/psb_fb.c
@@ -1767,8 +1767,6 @@ void psb_modeset_init(struct drm_device *dev)
dev->mode_config.funcs = (void *) &psb_mode_funcs;
- dev->mode_config.max_width = 2048;
- dev->mode_config.max_height = 2048;
/* set memory base */
/* MRST and PSB should use BAR 2*/
pci_read_config_dword(dev->pdev, PSB_BSM, (uint32_t *)
&(dev->mode_config.fb_base));
@@ -1776,6 +1774,9 @@ void psb_modeset_init(struct drm_device *dev)
for (i = 0; i < dev_priv->num_pipe; i++)
psb_intel_crtc_init(dev, i, mode_dev);
+ dev->mode_config.max_width = dev->mode_config.num_crtc *
MDFLD_PLANE_MAX_WIDTH;
+ dev->mode_config.max_height = dev->mode_config.num_crtc *
MDFLD_PLANE_MAX_HEIGHT;
+
psb_setup_outputs(dev);
/* setup fbs */
--
1.7.1
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