[Meego-kernel] [PATCH 10/22] GFX: MSVDS only need to wait when needed

[hitesh . k . patel]

From: Jason Hu <jason...@intel.com>

Refine overlay sync at vblank for advoiding dead wait.

Signed-off-by: Jason Hu <jason...@intel.com>
Signed-off-by: Hitesh K. Patel <hitesh.k.pa...@intel.com>
---
 drivers/staging/mrst/drv/psb_drv.c |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/mrst/drv/psb_drv.c 
b/drivers/staging/mrst/drv/psb_drv.c
index f76920f..77acf27 100644
--- a/drivers/staging/mrst/drv/psb_drv.c
+++ b/drivers/staging/mrst/drv/psb_drv.c
@@ -2327,8 +2327,16 @@ static int psb_register_rw_ioctl(struct drm_device *dev, 
void *data,
                                PSB_WVDC32(arg->overlay.OVADD, OV_OVADD);
 
                                 if (arg->overlay.b_wait_vblank) {
-                                    while (!(PSB_RVDC32(OV_DOVASTA) & (0x1 << 
31)))
+                                    /*Wait for 20ms.*/
+                                    unsigned long vblank_timeout = jiffies + 
HZ/50;
+                                    uint32_t temp;
+                                    while (time_before_eq(jiffies, 
vblank_timeout)) {
+                                        temp = PSB_RVDC32(OV_DOVASTA);
+                                        if ((temp & (0x1 << 31)) != 0) {
+                                            break;
+                                        }
                                         cpu_relax();
+                                    }
                                 }
 
                                if (IS_MDFLD(dev)) {
@@ -2370,8 +2378,16 @@ static int psb_register_rw_ioctl(struct drm_device *dev, 
void *data,
                        if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD) {
                                PSB_WVDC32(arg->overlay.OVADD, OVC_OVADD);
                                 if (arg->overlay.b_wait_vblank) {
-                                    while (!(PSB_RVDC32(OV_DOVASTA) & (0x1 << 
31)))
+                                    /*Wait for 20ms.*/
+                                    unsigned long vblank_timeout = jiffies + 
HZ/50;
+                                    uint32_t temp;
+                                    while (time_before_eq(jiffies, 
vblank_timeout)) {
+                                        temp = PSB_RVDC32(OVC_DOVCSTA);
+                                        if ((temp & (0x1 << 31)) != 0) {
+                                            break;
+                                        }
                                         cpu_relax();
+                                    }
                                 }
                         }
                        ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
-- 
1.7.1

_______________________________________________
MeeGo-kernel mailing list
MeeGo-kernel@lists.meego.com
http://lists.meego.com/listinfo/meego-kernel