RE: Mersenne: AMD K7 will

[Paul Leyland]

> What about "stackable" chips that can extend their bus width by a quantum
> of 64 bits?  Well, the intra-chip data paths are shorter, so that
inter-chip
> synchronization is so much of a problem -- it's sort of a "weakest link"
> kind of scenario -- that it makes more sense to give each chip its own
> memory

Otherwise known as bit-slice processors.  Been there, done that.  Over
fifteen years ago in my case, much longer than that for the really
old-timers


Paul