William Stuart wrote:
>
> On Mon, 26 Oct 1998, Bojan Antonovic wrote:
>
> [...schnipp...]
> >
> > My conjuncture is: there is no need for 128 bit instruction code, so 64 bit
> > inst. code will be the final one. FPU register will stay to use 64 bit, and
> > for the other one I can`t say nothing. The main part of speeding up
> > processors will be done be using multiple processors.
>
> Why do you believe there will be no 128bit processors? Isn't "more data
> at a time" always better?
Current 64-bit chips (Alpha family, I don't know about merced, but I
think
these were the patents Digital was suing Intel about, two years ago)
do some acceleration by performing two (or more?) wholly separate
operations
at the same time, when neither operation is going to stomp on the other.
This kind of thing is very tricky to write a compiler for. There also
is a physical limit (overcomable by developing 3-d semiconductors
perhaps,
but that is a embryonic technology, if it exists at all. Have you heard
of
anyone trying?) about passing signals to the other side of the bus at
high
speeds.
So as bus width increases parallelization is used to use it all, and the
complexity of the chip outweighs the speed gain possible by "more data
at
a time." If my 64-bit CPU is really running two 32-bit data streams,
but
has to slow down to sort out the timing at the doors, I might be better
off
with two 32-bit data streams really running in two different CPUs.
I'll even go so far as to conjecture that as speeds increase further
(possibly
with optical switching instead of electronic) we might see bus size come
back down, as synchronizing all the bits at high speeds becomes
unreliable
and components line the bits up and other components operate on them.
> I agree with you that advances in multiprocessing are needed and will be
> beneficial, but in the race for a better desktop machine, SMP does little
> to help.
An endless treadmill. What do you know about symetrical multiprocessing
that makes it worthless? It is where all OS designers are heading these
days it seems, you know.
> Without more info on the technical reasons behind your conjecture, I am
> willing to bet that at least one of the non-intel chip manufacturers
> announces a 128bit chip, if only to gain some attention.
This too is possible, for those applications that really do need
double-double-quad-word precission all the time.
What about "stackable" chips that can extend their bus width by a
quantum
of 64 bits? Well, the intra-chip data paths are shorter, so that
inter-chip
synchronization is so much of a problem -- it's sort of a "weakest link"
kind of scenario -- that it makes more sense to give each chip its own
memory
chips, work out some simple traffic rules for preventing two processors
from
both overwriting the same piece of "global" memory at the same time, and
divide
the work into large enough pieces that "task switching overhead" is
reduced.
Without more info on the technical reasons
behind your dismissal of symettric multiprocessing, all I can do
is respond with a lengthy essay and wonder if you were just trolling.
GIMPS is, after all, an example of SMP.
______________________________________________________________________
David Nicol 816.235.1187 UMKC Network Operations [EMAIL PROTECTED]
"No... I think I hit the group code."
