Met vriendelijke groet / kind regards,
Mike Looijmans System Expert TOPIC Embedded Products B.V. Materiaalweg 4, 5681 RJ Best The Netherlands T: +31 (0) 499 33 69 69 E: [email protected] W: www.topicproducts.com Please consider the environment before printing this e-mail On 20-01-2021 11:45, Leon Woestenberg via lists.yoctoproject.org wrote:
... For me it's still unclear what part of the steps are dependent on the PL (Programmable Logic) design, I think the PMU configuration object might be subject.
As far as I know - and daily practice confirms this - there's no relation whatsoever between the PMU firmware and anything in PL or PS. The PMU firmware is the same for all MPSoC boards. Nothing in the code depends on the specific type of MPSoC chip or the configuration of PS or PL.
There is a "config object" sent to the PMU firmware by either SPL or FSBL that sets a kind of "access rights" so you can configure that the R5 cores can access the SD1 controller and the A53 cannot for example. I've been using a "yes to all" variant of the config object that just allows access to all peripherals to both CPUs, so that you don't have to create a new bootloader just because you happen to have an FPGA image that uses the SPI controller for something.
The simplest solution was to just offer the PMU firmware as a binary download. That's what we've been using internally for years now. Just build it once with either yocto or Xilinx' toolchain, and keep the binary.
-- Mike Looijmans
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