Hi, 

On Saturday, December 31, 2011 13:13 CET, Stuart Henderson 
<s...@spacehopper.org> wrote: 
 
> On 2011-12-31, Sebastian Reitenbach <sebas...@l00-bugdead-prods.de> wrote:
> >> > Right now I'm running 4.6 on it, and thought, its time to upgrade, so 
> >> > installed -current from today ;)
> ..
> >> > When I use /dev/tty03 (the first port of the PUC), then it takes the 
> >> > speed values I give with cu -s correctly, and I can connect fine to the 
> >> > sparc, when its there connected.
> >> > The problems start with tty04, and up to tty0a, I guess all those ports 
> >> > just only take 1200 bauds.
> 
> >  0:14:0: Sunix 40XX
> >         0x0000: Vendor ID: 1409 Product ID: 7168
> >         0x0004: Command: 0181 Status ID: 0280
> >         0x0008: Class: 07 Subclass: 00 Interface: 02 Revision: 01
> >         0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 
> > 00
> >         0x0010: BAR io addr: 0x0000e500/0x0020
> >         0x0014: BAR io addr: 0x0000e520/0x0010
> >         0x0018: BAR io addr: 0x0000e530/0x0008
> >         0x001c: BAR io addr: 0x0000e538/0x0008
> >         0x0020: BAR io addr: 0x0000e540/0x0008
> >         0x0024: BAR io addr: 0x0000e548/0x0008
> >         0x0028: Cardbus CIS: 00000000
> >         0x002c: Subsystem Vendor ID: 1409 Product ID: 5066
> >         0x0030: Expansion ROM Base Address: 00000000
> >         0x0038: 00000000
> >         0x003c: Interrupt Pin: 01 Line: 0a Min Gnt: 00 Max Lat: 00
> 
> This was changed in pucdata.c r1.65 so we could get more exact matching on
> the various devices using the same PCI vendor/product ID as your device.
> 
> Diff below should put things back how they were for your card, but
> it doesn't quite tie in with what you say as the first *2* ports
> on the puc should have worked, not the first 1.

also naddy pointed me to pucdata.c. Your patch alone did not helped, trying it, 
I had the same garbage as without.
Then I removed the SUNIX entry before the chunk that your patch added, and it 
suddenly started to work like it did on the 4.6.

The patch to make it work for me would look like the one below.

thanks,
Sebastian


Index: pucdata.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.78
diff -u -r1.78 pucdata.c
--- pucdata.c   26 Oct 2011 14:20:25 -0000      1.78
+++ pucdata.c   31 Dec 2011 15:47:25 -0000
@@ -1441,17 +1441,17 @@
        },
 
        {   /* SUNIX 406X 8S */
-           {   PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_40XX, 0x1409, 0x4060 },
-           {   0xffff, 0xffff, 0xffff, 0xe0f0 },
+           {   PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_40XX, 0x1409, 0x5066 },
+           {   0xffff, 0xffff, 0xffff, 0xffff },
            {
                { PUC_COM_POW2(3), 0x10, 0x0000 },
                { PUC_COM_POW2(3), 0x10, 0x0008 },
-               { PUC_COM_POW2(3), 0x14, 0x0000 },
-               { PUC_COM_POW2(3), 0x14, 0x0008 },
-               { PUC_COM_POW2(3), 0x18, 0x0000 },
-               { PUC_COM_POW2(3), 0x1c, 0x0000 },
-               { PUC_COM_POW2(3), 0x20, 0x0000 },
-               { PUC_COM_POW2(3), 0x24, 0x0000 },
+               { PUC_COM_POW2(0), 0x14, 0x0000 },
+               { PUC_COM_POW2(0), 0x14, 0x0008 },
+               { PUC_COM_POW2(0), 0x18, 0x0000 },
+               { PUC_COM_POW2(0), 0x1c, 0x0000 },
+               { PUC_COM_POW2(0), 0x20, 0x0000 },
+               { PUC_COM_POW2(0), 0x24, 0x0000 },
            },
        },
 





> 
> Index: pucdata.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
> retrieving revision 1.78
> diff -u -p -r1.78 pucdata.c
> --- pucdata.c 26 Oct 2011 14:20:25 -0000      1.78
> +++ pucdata.c 31 Dec 2011 12:09:21 -0000
> @@ -1455,6 +1455,21 @@ const struct puc_device_description puc_
>           },
>       },
>  
> +     {   /* SUNIX 406X 8S */
> +         {   PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_40XX, 0x1409, 0x5066 },
> +         {   0xffff, 0xffff, 0xffff, 0xffff },
> +         {
> +             { PUC_COM_POW2(3), 0x10, 0x0000 },
> +             { PUC_COM_POW2(3), 0x10, 0x0008 },
> +             { PUC_COM_POW2(0), 0x14, 0x0000 },
> +             { PUC_COM_POW2(0), 0x14, 0x0008 },
> +             { PUC_COM_POW2(0), 0x18, 0x0000 },
> +             { PUC_COM_POW2(0), 0x1c, 0x0000 },
> +             { PUC_COM_POW2(0), 0x20, 0x0000 },
> +             { PUC_COM_POW2(0), 0x24, 0x0000 },
> +         },
> +     },
> +
>       {   /* SUNIX 407X 2S/1P */
>           {   PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_40XX, 0x1409, 0x4070 },
>           {   0xffff, 0xffff, 0xffff, 0xeff0 },

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