On Fri, Dec 19, 2003 at 01:34:38AM -0800, Trent Piepho wrote: > On Fri, 19 Dec 2003, Andrew Stevens wrote: > > The next bottlenecks would be the run-length coding and the use > > of variance instead of SAD in motion compensation mode and DCT > > mode selection. Sadly > > Is SAD really any faster to calculate than variance? SAD uses an > absolute value-add operation while variance is multiply-add. > Multiply-add is usually the most heavily optimized operation a cpu > can perform.
You are thinking DSP chips, not general purpose CPU's. For DSP's, yes, multiply-add is very heavilly optimized, but for general purpose CPU's, it's often not quite so heavilly optimized. Additionally, if you've got an SSE2 capable x86 chip, it's got parallel SAD operations in the SSE2 instruction set. There isn't an SSE2 mul-add operation yet. ------------------------------------------------------- This SF.net email is sponsored by: IBM Linux Tutorials. Become an expert in LINUX or just sharpen your skills. Sign up for IBM's Free Linux Tutorials. Learn everything from the bash shell to sys admin. Click now! http://ads.osdn.com/?ad_id=1278&alloc_id=3371&op=click _______________________________________________ Mjpeg-users mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/mjpeg-users
