On 09/02/2018 05:51 PM, Geoffrey Barton via mseide-msegui-talk wrote:
> 
> 
> 
> Unfortunately these do not control i2s & DMA, only timers and CAN.
> NB you can set those regs via software, they are only cleared by POR.
>
https://www.st.com/content/ccc/resource/technical/document/reference_manual/4d/ed/bc/89/b5/70/40/dc/DM00135183.pdf/files/DM00135183.pdf/jcr:content/translations/en.DM00135183.pdf
"
RM0390
Reference manual
STM32F446xx advanced Arm®-based 32-bit MCUs

23.4.16
Debug mode
When the microcontroller enters debug mode (core halted), the SMBus
timeout either
continues to work normally or stops, depending on the DBG_I2Cx_STOP
configuration bits
in the DBG module.

24.5
I2C debug mode
When the microcontroller enters the debug mode (Cortex ®-M4 with FPU
core halted), the
SMBUS timeout either continues to work normally or stops, depending on the
DBG_I2Cx_SMBUS_TIMEOUT configuration bits in the DBG module. For more
details,
refer to Section 33.16.2: Debug support for timers, watchdog, bxCAN and I2C.

33.16.2
Debug support for timers, watchdog, bxCAN and I2C
During a breakpoint, it is necessary to choose how the counter of timers
and watchdog
should behave:
•
 They can continue to count inside a breakpoint. This is usually
required when a PWM is
controlling a motor, for example.
•
 They can stop to count inside a breakpoint. This is required for
watchdog purposes.
For the bxCAN, the user can choose to block the update of the receive
register during a
breakpoint.
For the I2C, the user can choose to block the SMBUS timeout during a
breakpoint.

33.16.4
Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
The DBGMCU_APB1_FZ register is used to configure the MCU under Debug. It
concerns
APB1 peripherals. It is mapped on the external PPB bus at address 0xE004
2008.
The register is asynchronously reset by the POR (and not the system
reset). It can be
written by the debugger under system reset.
Address : 0xE004 2008
Only 32-bits access are supported.
Power-on reset (POR): 0x0000 0000 (not reset by system reset)

"
I did not read i carefully. ;-)

Martin

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