On Fri, 19 Mar 1999, Alwin Henseler wrote:
> > LD HL,address
> > LD C,D3h
> > LOOP: IN A,(D0h) ; 12 clocks
> > RRCA ; 5 clocks
> > JR NC,LOOP ; 9 or 12 clocks
> > RRCA ; 5 clocks
> > RET NC ; 9 clocks
> > INI ; 21 clocks (I guess)
> > JP LOOP ; 10 clocks
> >
> > Total: 71 clockcicles. Conclusion: you're right, it's not possible to use
> > 1.2Mb or 1.44Mb disks with Z80 at 3.57MHz. It's BAD!
>
> In principle this could work!
>
> The 2793 floppycontroller HAS the capacity to handle 500 Kbit/s
> (apparantly, this was used for larger 8 inch disks -a loooonnngg,
> loooonnngg, time ago).
Are you SURE??? If WD2793 has this capacity, then let's do a big research!
> Can the Z80 handle that?
>
> 500 Kbit/s = 62.5 Kbyte/sec.
> 3.58 MHz / 62500 = 57 clockticks per byte. A bit tight, but possible!
Exactly what I had calculated.
> Take the above loop:
>
> LOOP:
> IN A,(D0h) 12 ticks
> RRCA 5 ticks
> JR NC,LOOP 8 ticks if skipped, 13 if jumping
> RRCA 5 ticks
> RET NC 6 ticks if skipped, 12 ticks if returning
> INI 17 ticks
> JP LOOP 11 ticks
Did you verify a clockcycles table for this instructions? They're a bit
different from my values.
> If the 1st JR is done: 12+5+13=30 ticks, far less than 57.
> Otherwise 12+5+8+5+6+17+11=64 ticks, a tiny bit too many
>
> But speed-up's are still possible here:
>
> -Drop the JP at the end, and put what's before it xx times after each
> other. Doesn't look nice as source code, but works. You could also
> copy this piece of code xxx times to RAM and execute that
Yes, that's a kind of code decompression, and, according to your data,
we'lll achieve 53 clockcycles. That works! But it's not a ellegant
solution.
> -put address of (LOOP) in IX or IY, and replace JP LOOP with JP (IX)
> or JP (IY): takes 9 instead of 11 ticks. Or even use JP (HL): uses
> only 5 (!) ticks
JP (HL) can't be used, because the INI instruction already uses it. JP
(indexed register) is not a big deal, because reduces only 2 clockcycles,
and still won't work.
> -INI and instructions working with pointers use 16-bit counters.
> Could be replaced with sequences like INC HL: DJNZ LOOP. If you take
> a fixed transfer address (sector buffer!) with start address xx00h,
> you can replace that INC HL with INC L.
16 bit counters? But it uses only B register to count, and C is the port!
Turbo-R uses INC HL/DJNZ LOOP, and I think that it's bad, because it can't
transfer sectors with different sizes (1kb for example). INC L can be a
good idea. How many clockcycles do INC HL and INC L use?
> -The memory mapped I/O construction used by the floppycontroller in
> European MSX's gives more instructions that you could use (more Z80
> instructions dealing with memory than with I/O)
because that I ever recommended to use port based FDC!!!
> -Do the INI in the above loop for starters (!): increases pointers,
> AND sets flags!
I didn't understand. Could you explain what do you mean?
> -> Allows to test those flags immediately (=drop another 5-tick
> instruction). If a byte did come in, you're done, if not, simply
> decrease pointers again
That's very important, but I could see how we can do it.
> Combining the above: not easy, but it COULD be done !
Yes! I believe that I can be done. But only for port base FDC. :-(
Greetings from Brazil!
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