On Sun, 28 Mar 1999, Alwin Henseler wrote:

> Marco Antonio Simon dal Poz  <[EMAIL PROTECTED]>  wrote:
> 
> > > The 2793 floppycontroller HAS the capacity to handle 500 Kbit/s 
> > > (apparantly, this was used for larger 8 inch disks -a loooonnngg, 
> > > loooonnngg, time ago).
> > 
> > Are you SURE??? If WD2793 has this capacity, then let's do a big research!
> 
> Texas Instruments TMS 2793 (is the same FDC) datasheets say so (no 
> doubt), and I don't think they lie. The 2793 works with a 'bit clock' 
> that is a combination of some quartz input frequency (mostly 1 or 2, 
> and can be 4 MHz.), and both hardware- and software-settable 
> dividers. Like 2 MHz. divided by 8 -> 250 Kbits/sec.

I was looking my old magazines, when I saw an advertisement of a
address-based interface (by Technoahead), and there says that there's a
clock of 16MHz!!! Perhaps they didn't use WD2793, but if the clock can be
so high, then with a hardware modification we can use WD2793 for
500kbit/s.

> Resulting bit clocks are mentioned of 125, 250 (DD disks) AND 500 
> (8" and HD disks) KHz., or Kbits/sec, if you wish.

And how can we set the right transfer rate in MSX? AFAIK, there's no
port/address where we can set it.

> > [...Z80 clockcycle counts...]
> >
> > Did you verify a clockcycles table for this instructions? They're a bit
> > different from my values.
> 
> A bit different? You mean: 1 clocktick different..!!

Approximately. I think that I have already counted this M1 extra cycle.

> One rule became clear, of which I have never found an exception yet:
> 
> Clockcycles taken by the Z80 in a MSX are the same as is stated in 
> Z80 datasheets (I used Zilog's), PLUS ONE.

Yes, all emulator makers have confirmed it.

> This behaviour matches perfectly MSX definition: Z80 CPU, with 1 wait 
> state in M1 (machine cycle one).
> In other words: normal Z80 timing, with every intruction taking 1 
> clockcycle extra.
> Ofcourse same timings apply for Turbo-R in Z80 mode.

Ok. Is there some way of disabling these extra clockcycle?

> > > -Do the INI in the above loop for starters (!): increases pointers, 
> > > AND sets flags!
> > 
> > I didn't understand. Could you explain what do you mean?
> 
> According to Zilog docs, the INI instruction DOES change flags. How 
> exactly, I don't know. It's kind a like with the IN F,(C) 
> instruction, Zilog says: affects flags (and it does), but doesn't say 
> how. I only suggested that maybe you could use this effect. Maybe you 
> can find a description of the exact behaviour on Sean Young's pages 
> (http://www.msxnet.org).

We can ask Ricardo Bittencourt (BrMSX's author) for which flags are
affected by the INI instruction. I think that only bits 3 and 5 of the
flag-register are affected, plus the Z-flag (when B is decreased and
becomes 0).

Greetings from Brazil!

-----------------------------------------------------------------
Marco Antonio Simon Dal Poz        http://www.lsi.usp.br/~mdalpoz
[EMAIL PROTECTED]   "Apple" (c) Copyright 1767, Sir Isaac Newton

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