You only use one finger to type? I don't want to know which one!

 

Yes, I have that book, I've read through it, very good book.  I'll have to 
return to re-read those sections.

 

Cheers,

Josh


 



From: [email protected]
To: [email protected]
Subject: RE: [N8VEM-S100:3513] Phantom of the S-100
Date: Mon, 5 May 2014 22:39:45 -0700







Josh there is much there in your questions -- too much for a single finger 
typist like me! Take a look at the S100Computers web site for the CPU cards.  
If you want to understand the S100 bus properly you should get your hands on 
the Sol Libes & Mark Garetz book "Interfacing to the S100 bus".  The general 
use of the term "Slave"  for the S100 bus normally refers to a CPU board (or 
DMA controller) not RAM boards etc.
 
John
 
 


From: [email protected] [mailto:[email protected]] On 
Behalf Of Crusty OMO
Sent: Monday, May 5, 2014 10:00 PM
To: [email protected]
Subject: RE: [N8VEM-S100:3511] Phantom of the S-100
 

Hi John,

This is good, Phantom should then work for I/O the same as with Memory.

Phantom is for overlaying "BUS SLAVES".  This is understood, but where I'm 
getting a little confused is the use of the word Master and Slaves.  If I 
understand this correctly, the first and original use of Master / Slave is the 
basic 1 CPU board (being the Master board) and several expansion boards for 
memory, I/O, Disk, etc (these are the Slave boards).  The fundamental 
difference between these boards (assuming the 8 bit bus) is the flow of Data 
through Data-IN and DATA-OUT buses.

Now, if I understand correctly, there is a second use of Master and Slave.  
This would be when we want more than 1 CPU card in a system.  1 CPU at a time 
is allowed to be the Master, but how is this done?  Does the Master simply 
disconnect the Slave CPU from the bus with the 4 disable lines for the 4 buses? 
 What does the Slave CPU do when it's disabled?  Does it go into a wait mode?  
Does this system allow more than twp CPU boards?
Where you wrote below, "However you will have to phantom out any overlap with 
other RAM board  if present when that slave is the current bus master." ,  Is 
this use of "bus master" / slave referencing a CPU master/slave?

I think I'm slowly getting it.  I want this board to have RAM and I/O, I want 
those resources to be available to other CPU's in the system.  At the moment, 
I'm only thinking of having only one CPU active (ie, when this board is a 
slave, it's CPU never operates), but it would be more elegant to have the 
feature where two CPU"s can live on the same bus, sharing all their resources 
and passing control of the bus back and forth to each other.

Cheers,
Josh







From: [email protected]
To: [email protected]
Subject: RE: [N8VEM-S100:3502] Phantom of the S-100
Date: Mon, 5 May 2014 19:07:57 -0700

The IEEE-696 definition of the Phantom line states:-
"The Phantom* line is provided for overlaying bus slaves at a common address 
location.  When this line is activated, phantom bus slaves are enabled and 
normal slaves are disabled."
I read this as, yes, both RAM and port addresses.  Normally a total card 
disappears from the bus if it is monitoring the phantom line, via its board 
select (BS) line.
 
Do not confuse a master/slave switchover and a phantom line call.  The latter 
is always done by the current master (can be any one of 16 total) .  
 
It's up to you how you want your RAM to behave on your CPU board.  It can be 
local to the board -- as for example is the ROM on our Z80 board, or shared 
with other CPU's. The former has the advantage that it does not get in the way  
where that CPU is no longer the bus master.  If it is visible when the CPU is 
no longer the bus master, you can still use that RAM.  However you will have to 
phantom out any overlap with other RAM board  if present when that slave is the 
current bus master.
 
 
Nothing special about access. As I said phantom normally just inactivates a 
board select line.  Unless you are using DRAM's (a whole other situation),  
memory RD/WR signals should be fine.
Take a look at the phantom line on our old 4MB Static RAM board
http://s100computers.com/My%20System%20Pages/RAM%20Board/4MG%20RAM%20Board.htm
 
 
Hope this helps
John
 
 
 
 
 
 


From: [email protected] [mailto:[email protected]] On 
Behalf Of Crusty OMO
Sent: Monday, May 5, 2014 6:17 PM
To: [email protected]
Subject: RE: [N8VEM-S100:3500] Phantom of the S-100
 

Ok, I have the CPU board and Memory working with the FP.  Had trouble with the 
FP driving all these chips on a single board, so I put in another buffer chip 
between the FP and the local bus.  Fixed a few other timing issues/errors along 
the way.

Now, I have some questions about the Phantom line.  When another board asserts 
the Phantom line, boards that respond to this line will prevent their output to 
the bus.  This output is understood to be from the memory map, but is the 
Phantom LIne suppose to also nuke access to I/O?  

Next, if the CPU board has Memory on board and an external board asserts the 
Phantom line, then should the CPU switch it's input from the local memory to 
the Data In bus?  That would make sense to me.

Boards that do assert the Phantom line, do they synchronize the Phantom line 
with memory read/write cycles? or, I mean to say the State of the CPU, ie, is 
Phantom allowed to be active during a pSync state? (which happens at the start 
of every cycle).
On the 8080A, the Data Out should have the Status Byte during pSync, how do 
boards that generate phantom allow for that?

Thanks,
Josh Bensadon
 
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