On Tuesday, July 14, 2015 at 4:57:07 PM UTC-7, Jeff Albrecht wrote: > > On Tuesday, July 14, 2015 at 11:54:21 AM UTC-7, monahanz wrote: >> >> Those IDE boards are in fact a very simple boards. Essentially you are >> just talking to a 8255 three port chip. If you cannot write, you need to >> determine where the log jam is. Using a simple logic probe determine if >> the chip CS* lines is going low with a write. If WR* is going low etc. >> Single step through a simple continuous write loop in RAM. Eg:- >> > > These three screen captures are from my Owon DS7102V connected to pin 23 > of GAL 1. The test computer is a IDE/CF v3 card in a CCS Z80 running it's > ROM monitor. Similar results were obtained from A CompuPro ZPU running DDT > under CP/M. I don't specifically remember seeing the ?glitches? when I ran > this simple test on an Altair when I began this theread. >
I guess that ?glitch? is not to worry. I seem to have a clean CS on pin 6 of the 8255 with the test loop running with IN or OUTs in the loop. -- You received this message because you are subscribed to the Google Groups "N8VEM-S100" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
