From: [email protected] [mailto:[email protected]]
Sent: Wednesday, July 15, 2015 11:29 AM
To: [email protected]
Subject: Re: [N8VEM-S100:7414] Re: V3 Dual IDE/CF S100 Bus board initial checks
More info.
Configuration is as I said: CompuPro CPU-Z80 @ 4 MHz, Digital Research
Computers 64k static RAM, N8VEM serial card (port addresses @ 0Axh), and of
course, the V3 card.
Send 92h to control port (33h), and I can read bits on port B and they make
sense (i.e. correct bit positions - put +5 on B3 and read 08h, put +5 on B2,B3
and read 0Ch, etc., etc.). BUT, if I send 80h to port 33h, and then output 55h
to port B, *ALL* port B pins show nothing. My logic probe doesn't even show
them as "high" or "low". They don't register at all (almost seems that they
are tri-stated?). I've tried other ports on the 8255 with the same result. I
swapped 8255s and see the same result.
Roger are you sure you are sending the right configuration codes to the 8255.
I don’t want to have to spend time going back and digging into that to find the
bits are wrong. How familiar are you with the 8255?
Another curious thing is that there is activity on all RD*,WR*,and CS* of the
8255 while trying to output to port B. That shouldn't be, right? Shouldn't
WR* and CS* be active, and RD* high? I can trace all three signals back to the
GAL(2) ... pins 15,16, and 23 (if I remember correctly) show the same activity
(all pulsing). Even when *ALL* I/O to the 8255 is stopped, RD* shows activity
at the 8255 and the GAL(2) (but WR* and CS* are both high).
Absolutely incorrect! RD* & WR* are the generalized bus signals pulsing all
the time. They are relevant to the 8255 ONLY when CS* is low.
Roger don’t take it personally, but I’m beginning to feel you are out of your
depth hardware wise. Do you want just send the darn board to me and I will
check it out.
If so send personal e-mail.
John
Any clues in there?
Roger
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