Right. Hopefully at least a linux method of interacting with the JTAG interface can be found. Even if the rest has to be done under WINE or by purchasing the Xilinx ISE 6 for Linux.
If it's a standard Xilinx DLC5, openwince's JTAG tools know how to interact with it. THey might not knkow how to download the bitstream, but I believe that information is in the reference manual. Openwince-jtag supports most all parallel download cables.
joshua
The specs of this board only reinforce the probability that if Timothy can put together a card with 10 times the gates and 100 times the memory (DRAM vs SRAM) priced only 50-100% more, it will be a cult hit in its own right, let alone the advantages for ASIC development.
Is it too early to be making plans for my ATI 9xxx board? :)
Another link for a book I've enjoyed so far today. It's looks like the Rubini & Corbet of the Spartan 3 Family.
PROGRAMMABLE LOGIC DESIGN: QUICK START HANDBOOK by Karen Parnell and Nick Mehta http://www.xilinx.com/publications/products/cpld/logic_handbook.pdf
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